[src/trunk]: src/sys/arch/arm/rockchip - Set DWC_MMC_F_FORCE_CLK

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e24fdeb70726
branches:  trunk
changeset: 335204:e24fdeb70726
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Dec 29 23:59:52 2014 +0000

description:
- Set DWC_MMC_F_FORCE_CLK
- Force max sdmmc clk to 24MHz
- Update for simpler dwcmmc clock setup

diffstat:

 sys/arch/arm/rockchip/rockchip_dwcmmc.c |  23 +++++++++--------------
 1 files changed, 9 insertions(+), 14 deletions(-)

diffs (58 lines):

diff -r 6d7ed27727f6 -r e24fdeb70726 sys/arch/arm/rockchip/rockchip_dwcmmc.c
--- a/sys/arch/arm/rockchip/rockchip_dwcmmc.c   Mon Dec 29 23:58:25 2014 +0000
+++ b/sys/arch/arm/rockchip/rockchip_dwcmmc.c   Mon Dec 29 23:59:52 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_dwcmmc.c,v 1.3 2014/12/28 16:27:14 jmcneill Exp $ */
+/* $NetBSD: rockchip_dwcmmc.c,v 1.4 2014/12/29 23:59:52 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rockchip_dwcmmc.c,v 1.3 2014/12/28 16:27:14 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rockchip_dwcmmc.c,v 1.4 2014/12/29 23:59:52 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -48,8 +48,6 @@
 
 static void    rk_dwcmmc_attach_i(device_t);
 
-static int     rk_dwcmmc_set_clkdiv(struct dwc_mmc_softc *, int);
-
 CFATTACH_DECL_NEW(rkdwcmmc, sizeof(struct dwc_mmc_softc),
        rk_dwcmmc_match, rk_dwcmmc_attach, NULL, NULL);
 
@@ -65,13 +63,16 @@
        struct dwc_mmc_softc *sc = device_private(self);
        struct obio_attach_args * const obio = aux;
 
+       rockchip_mmc0_set_div(1);
+
        sc->sc_dev = self;
        sc->sc_bst = obio->obio_bst;
        sc->sc_dmat = obio->obio_dmat;
-       sc->sc_flags = DWC_MMC_F_USE_HOLD_REG | DWC_MMC_F_PWREN_CLEAR;
-       sc->sc_clock_freq = rockchip_ahb_get_rate();
-       sc->sc_fifo_depth = 256;
-       sc->sc_set_clkdiv = rk_dwcmmc_set_clkdiv;
+       sc->sc_flags = DWC_MMC_F_USE_HOLD_REG | DWC_MMC_F_PWREN_CLEAR |
+                      DWC_MMC_F_FORCE_CLK;
+       sc->sc_clock_freq = rockchip_mmc0_get_rate();
+       sc->sc_clock_max = 24000;
+       sc->sc_fifo_depth = 32;
 
        bus_space_subregion(obio->obio_bst, obio->obio_bsh, obio->obio_offset,
            obio->obio_size, &sc->sc_bsh);
@@ -97,9 +98,3 @@
 
        dwc_mmc_init(sc);
 }
-
-static int
-rk_dwcmmc_set_clkdiv(struct dwc_mmc_softc *sc, int div)
-{
-       return rockchip_mmc0_set_div(div);
-}