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[src/trunk]: src/sys/arch/evbarm/rockchip do armv7_dcache_inv_all before cort...
details: https://anonhg.NetBSD.org/src/rev/a42e824d96a1
branches: trunk
changeset: 335237:a42e824d96a1
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Tue Dec 30 21:24:36 2014 +0000
description:
do armv7_dcache_inv_all before cortex_mpstart on secondaries
diffstat:
sys/arch/evbarm/rockchip/rockchip_start.S | 23 +++++++++++++++++------
1 files changed, 17 insertions(+), 6 deletions(-)
diffs (54 lines):
diff -r a8563e359749 -r a42e824d96a1 sys/arch/evbarm/rockchip/rockchip_start.S
--- a/sys/arch/evbarm/rockchip/rockchip_start.S Tue Dec 30 20:57:37 2014 +0000
+++ b/sys/arch/evbarm/rockchip/rockchip_start.S Tue Dec 30 21:24:36 2014 +0000
@@ -43,7 +43,7 @@
#include <arm/cortex/scu_reg.h>
-RCSID("$NetBSD: rockchip_start.S,v 1.3 2014/12/28 21:34:33 jmcneill Exp $")
+RCSID("$NetBSD: rockchip_start.S,v 1.4 2014/12/30 21:24:36 jmcneill Exp $")
#if defined(VERBOSE_INIT_ARM)
#define XPUTC(n) mov r0, n; bl xputc
@@ -180,8 +180,8 @@
#endif
rockchip_mptramp:
ldr pc, 1f
-.global cortex_mpstart_vec
-cortex_mpstart_vec:
+.global rockchip_mpstart_vec
+rockchip_mpstart_vec:
1: .space 4
rockchip_mpinit:
@@ -196,9 +196,9 @@
/* Set where the other CPU(s) are going to execute */
XPUTC2(#118)
- movw r1, #:lower16:cortex_mpstart
- movt r1, #:upper16:cortex_mpstart
- ldr r0, =cortex_mpstart_vec
+ movw r1, #:lower16:rockchip_mpstart
+ movt r1, #:upper16:rockchip_mpstart
+ ldr r0, =rockchip_mpstart_vec
str r1, [r0]
ldr r0, =rockchip_mptramp
mov r2, #0
@@ -278,6 +278,17 @@
#ifndef KERNEL_BASES_EQUAL
.popsection
#endif
+
+rockchip_mpstart:
+ /* invalidate cache */
+ movw ip, #:lower16:_C_LABEL(armv7_dcache_inv_all)
+ movt ip, #:upper16:_C_LABEL(armv7_dcache_inv_all)
+#ifndef KERNEL_BASES_EQUAL
+ sub ip, ip, #KERNEL_BASE_VOFFSET
+#endif
+ blx ip
+ b _C_LABEL(cortex_mpstart)
+
#endif /* MULTIPROCESSOR */
.Lmmu_init_table:
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