[src/trunk]: src/sys/arch/arm/rockchip add some more bits

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d565eeec0daf
branches:  trunk
changeset: 335247:d565eeec0daf
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Dec 31 18:08:58 2014 +0000

description:
add some more bits

diffstat:

 sys/arch/arm/rockchip/rockchip_crureg.h |  12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diffs (34 lines):

diff -r ca802958444d -r d565eeec0daf sys/arch/arm/rockchip/rockchip_crureg.h
--- a/sys/arch/arm/rockchip/rockchip_crureg.h   Wed Dec 31 17:36:24 2014 +0000
+++ b/sys/arch/arm/rockchip/rockchip_crureg.h   Wed Dec 31 18:08:58 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_crureg.h,v 1.5 2014/12/30 03:53:52 jmcneill Exp $ */
+/* $NetBSD: rockchip_crureg.h,v 1.6 2014/12/31 18:08:58 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -62,7 +62,12 @@
 #define CRU_PLL_CON1_CLKF_MASK __BITS(31,16)
 #define CRU_PLL_CON1_CLKF      __BITS(15,0)
 
+#define CRU_PLL_CON2_BWADJ_MASK        __BITS(27,16)
+#define CRU_PLL_CON2_BWADJ     __BITS(11,0)
+
+#define CRU_PLL_CON3_RESET_MASK        __BIT(21)
 #define CRU_PLL_CON3_POWER_DOWN_MASK __BIT(17)
+#define CRU_PLL_CON3_RESET     __BIT(5)
 #define CRU_PLL_CON3_POWER_DOWN        __BIT(1)
 
 #define CRU_MODE_CON_APLL_WORK_MODE_MASK       __BITS(17,16)
@@ -105,6 +110,11 @@
 #define CRU_CLKSEL_CON11_MMC0_PLL_SEL          __BIT(6)
 #define CRU_CLKSEL_CON11_MMC0_DIV_CON          __BITS(5,0)
 
+#define CRU_CLKSEL_CON13_UART0_CLK_SEL_MASK    __BITS(25,24)
+#define CRU_CLKSEL_CON13_UART0_DIV_CON_MASK    __BITS(22,16)
+#define CRU_CLKSEL_CON13_UART0_CLK_SEL         __BITS(9,8)
+#define CRU_CLKSEL_CON13_UART0_DIV_CON         __BITS(6,0)
+
 #define CRU_GLB_SRST_FST_MAGIC 0xfdb9
 
 #endif /* !_ROCKCHIP_CRUREG_H */