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[src/trunk]: src/sys/arch/arm/rockchip back out r1.8, its fine (and preferred...
details: https://anonhg.NetBSD.org/src/rev/71393bd26033
branches: trunk
changeset: 335322:71393bd26033
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Fri Jan 02 23:23:17 2015 +0000
description:
back out r1.8, its fine (and preferred) to write value before direction reg
diffstat:
sys/arch/arm/rockchip/obio.c | 16 ++++++++--------
1 files changed, 8 insertions(+), 8 deletions(-)
diffs (47 lines):
diff -r f60a7e5b52df -r 71393bd26033 sys/arch/arm/rockchip/obio.c
--- a/sys/arch/arm/rockchip/obio.c Fri Jan 02 23:20:49 2015 +0000
+++ b/sys/arch/arm/rockchip/obio.c Fri Jan 02 23:23:17 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: obio.c,v 1.9 2015/01/02 21:59:29 jmcneill Exp $ */
+/* $NetBSD: obio.c,v 1.10 2015/01/02 23:23:17 jmcneill Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include "opt_rockchip.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.9 2015/01/02 21:59:29 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.10 2015/01/02 23:23:17 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -237,22 +237,22 @@
{
#if 1
/* Radxa Rock */
+ obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(3));
obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(3));
- obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(3));
+ obio_swporta(ROCKCHIP_GPIO2_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(31));
obio_swporta(ROCKCHIP_GPIO2_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(31));
- obio_swporta(ROCKCHIP_GPIO2_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(31));
/* IT66121 HDMI */
+ obio_swporta(ROCKCHIP_GPIO3_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(10));
obio_swporta(ROCKCHIP_GPIO3_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(10));
- obio_swporta(ROCKCHIP_GPIO3_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(10));
#else
/* ChipSPARK Rayeager PX2 */
+ obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(5));
obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(5));
- obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(5));
+ obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(6));
obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(6));
- obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(6));
+ obio_swporta(ROCKCHIP_GPIO1_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(31));
obio_swporta(ROCKCHIP_GPIO1_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(31));
- obio_swporta(ROCKCHIP_GPIO1_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(31));
#endif
}
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