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[src/trunk]: src/sys/arch/arm/rockchip with 3.3V we can run this at 48MHz
details: https://anonhg.NetBSD.org/src/rev/367a7e51f498
branches: trunk
changeset: 335332:367a7e51f498
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat Jan 03 13:29:02 2015 +0000
description:
with 3.3V we can run this at 48MHz
diffstat:
sys/arch/arm/rockchip/rockchip_dwcmmc.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diffs (28 lines):
diff -r d441951e64e3 -r 367a7e51f498 sys/arch/arm/rockchip/rockchip_dwcmmc.c
--- a/sys/arch/arm/rockchip/rockchip_dwcmmc.c Sat Jan 03 13:28:00 2015 +0000
+++ b/sys/arch/arm/rockchip/rockchip_dwcmmc.c Sat Jan 03 13:29:02 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_dwcmmc.c,v 1.4 2014/12/29 23:59:52 jmcneill Exp $ */
+/* $NetBSD: rockchip_dwcmmc.c,v 1.5 2015/01/03 13:29:02 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rockchip_dwcmmc.c,v 1.4 2014/12/29 23:59:52 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rockchip_dwcmmc.c,v 1.5 2015/01/03 13:29:02 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -71,7 +71,9 @@
sc->sc_flags = DWC_MMC_F_USE_HOLD_REG | DWC_MMC_F_PWREN_CLEAR |
DWC_MMC_F_FORCE_CLK;
sc->sc_clock_freq = rockchip_mmc0_get_rate();
+#if 0
sc->sc_clock_max = 24000;
+#endif
sc->sc_fifo_depth = 32;
bus_space_subregion(obio->obio_bst, obio->obio_bsh, obio->obio_offset,
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