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[src/trunk]: src/sys/arch/arm/samsung Add KPLL
details: https://anonhg.NetBSD.org/src/rev/62cad8c808dc
branches: trunk
changeset: 332654:62cad8c808dc
user: reinoud <reinoud%NetBSD.org@localhost>
date: Thu Oct 02 11:39:45 2014 +0000
description:
Add KPLL
diffstat:
sys/arch/arm/samsung/exynos5_reg.h | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diffs (23 lines):
diff -r 99f671a240b7 -r 62cad8c808dc sys/arch/arm/samsung/exynos5_reg.h
--- a/sys/arch/arm/samsung/exynos5_reg.h Thu Oct 02 11:27:09 2014 +0000
+++ b/sys/arch/arm/samsung/exynos5_reg.h Thu Oct 02 11:39:45 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos5_reg.h,v 1.17 2014/09/24 20:35:43 reinoud Exp $ */
+/* $NetBSD: exynos5_reg.h,v 1.18 2014/10/02 11:39:45 reinoud Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -60,11 +60,12 @@
#define EXYNOS5_CMU_MPLL 0x00014000 /* MEM cntr. clock */
#define EXYNOS5_CMU_TOP_PART_OFFSET 0x00020000
#define EXYNOS5_CMU_CPLL 0x00020020 /* Video hardware codec clock */
-#define EXYNOS5_CMU_EPLL 0x00020030 /* Audio and ext. interf. clock */
+#define EXYNOS5_CMU_DPLL 0x00020030 /* Audio and ext. interf. clock */
#define EXYNOS5_CMU_VPLL 0x00020040 /* Dither PLL (EMI reduction) clock */
#define EXYNOS5_CMU_GPLL 0x00020050 /* Graphic 3D proc. clock */
#define EXYNOS5_CMU_MEM_PART_OFFSET 0x00030000
#define EXYNOS5_CMU_BPLL 0x00030010
+#define EXYNOS5_CMU_KPLL 0x00038010
#define EXYNOS5_ALIVE_OFFSET 0x00040000
#define EXYNOS5_PMU_OFFSET 0x00040000 /* alias */
#define EXYNOS5_SYSREG_OFFSET 0x00050000
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