[src/trunk]: src/sys/arch/arm/arm Fixup some comments.

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d9294509200d
branches:  trunk
changeset: 331066:d9294509200d
user:      skrll <skrll%NetBSD.org@localhost>
date:      Wed Jul 30 07:20:34 2014 +0000

description:
Fixup some comments.

diffstat:

 sys/arch/arm/arm/cpufunc_asm_arm11x6.S |  10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diffs (45 lines):

diff -r 381e2d72b576 -r d9294509200d sys/arch/arm/arm/cpufunc_asm_arm11x6.S
--- a/sys/arch/arm/arm/cpufunc_asm_arm11x6.S    Wed Jul 30 07:11:57 2014 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_arm11x6.S    Wed Jul 30 07:20:34 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_arm11x6.S,v 1.5 2014/07/30 07:11:57 skrll Exp $    */
+/*     $NetBSD: cpufunc_asm_arm11x6.S,v 1.6 2014/07/30 07:20:34 skrll Exp $    */
 
 /*
  * Copyright (c) 2007 Microsoft
@@ -63,7 +63,7 @@
 #include <machine/asm.h>
 #include <arm/locore.h>
 
-RCSID("$NetBSD: cpufunc_asm_arm11x6.S,v 1.5 2014/07/30 07:11:57 skrll Exp $")
+RCSID("$NetBSD: cpufunc_asm_arm11x6.S,v 1.6 2014/07/30 07:20:34 skrll Exp $")
 
 #if 0
 #define Invalidate_I_cache(Rtmp1, Rtmp2) \
@@ -140,7 +140,7 @@
        add     r1, r1, r0
        sub     r1, r1, #1
        /* Erratum ARM1136 371025, workaround #2 */
-       /* Erratum ARM1176 371367 */
+       /* Erratum ARM1176 371367, workaround #2 */
        mrs     r2, cpsr                /* save the CPSR */
        cpsid   ifa                     /* disable interrupts (irq,fiq,abort) */
        mov     r3, #0
@@ -158,7 +158,7 @@
        nop
        nop
 
-       mcrr    p15, 0, r1, r0, c12     /* clean and invalidate D cache range */ /* XXXNH */
+       mcrr    p15, 0, r1, r0, c12     /* clean D cache range */
        mcr     p15, 0, r0, c7, c10, 4  /* drain the write buffer */
        RET
 END(arm11x6_icache_sync_range)
@@ -167,7 +167,7 @@
        add     r1, r1, r0
        sub     r1, r1, #1
        /* Erratum ARM1136 371025, workaround #2 */
-       /* Erratum ARM1176 371367 */
+       /* Erratum ARM1176 371367, workaround #2 */
        mrs     r2, cpsr                /* save the CPSR */
        cpsid   ifa                     /* disable interrupts (irq,fiq,abort) */
        mov     r3, #0