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[src/trunk]: src/sys/arch NVIDIA Tegra K1 support, work in progress.
details: https://anonhg.NetBSD.org/src/rev/b88481442181
branches: trunk
changeset: 336983:b88481442181
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun Mar 29 10:41:59 2015 +0000
description:
NVIDIA Tegra K1 support, work in progress.
diffstat:
sys/arch/arm/nvidia/files.tegra | 64 +++++
sys/arch/arm/nvidia/soc_tegra124.c | 57 ++++
sys/arch/arm/nvidia/tegra_ahcisata.c | 90 +++++++
sys/arch/arm/nvidia/tegra_apbreg.h | 87 +++++++
sys/arch/arm/nvidia/tegra_com.c | 109 ++++++++
sys/arch/arm/nvidia/tegra_ehci.c | 109 ++++++++
sys/arch/arm/nvidia/tegra_hdaudio.c | 136 +++++++++++
sys/arch/arm/nvidia/tegra_intr.h | 54 ++++
sys/arch/arm/nvidia/tegra_io.c | 165 +++++++++++++
sys/arch/arm/nvidia/tegra_mc.c | 103 ++++++++
sys/arch/arm/nvidia/tegra_mcreg.h | 37 +++
sys/arch/arm/nvidia/tegra_pmc.c | 107 ++++++++
sys/arch/arm/nvidia/tegra_pmcreg.h | 56 ++++
sys/arch/arm/nvidia/tegra_reg.h | 95 +++++++
sys/arch/arm/nvidia/tegra_sdhc.c | 135 +++++++++++
sys/arch/arm/nvidia/tegra_soc.c | 122 +++++++++
sys/arch/arm/nvidia/tegra_space.c | 416 ++++++++++++++++++++++++++++++++++
sys/arch/arm/nvidia/tegra_var.h | 90 +++++++
sys/arch/evbarm/conf/JETSONTK1 | 237 +++++++++++++++++++
sys/arch/evbarm/conf/files.tegra | 10 +
sys/arch/evbarm/conf/mk.tegra | 33 ++
sys/arch/evbarm/conf/std.tegra | 26 ++
sys/arch/evbarm/tegra/genassym.cf | 38 +++
sys/arch/evbarm/tegra/platform.h | 39 +++
sys/arch/evbarm/tegra/tegra_machdep.c | 330 ++++++++++++++++++++++++++
sys/arch/evbarm/tegra/tegra_start.S | 181 ++++++++++++++
26 files changed, 2926 insertions(+), 0 deletions(-)
diffs (truncated from 3030 to 300 lines):
diff -r 4b33e7aa3878 -r b88481442181 sys/arch/arm/nvidia/files.tegra
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/nvidia/files.tegra Sun Mar 29 10:41:59 2015 +0000
@@ -0,0 +1,64 @@
+# $NetBSD: files.tegra,v 1.1 2015/03/29 10:41:59 jmcneill Exp $
+#
+# Configuration info for NVIDIA Tegra ARM Peripherals
+#
+
+include "arch/arm/pic/files.pic"
+include "arch/arm/cortex/files.cortex"
+
+file arch/arm/arm32/arm32_boot.c
+file arch/arm/arm32/arm32_kvminit.c
+file arch/arm/arm32/arm32_reboot.c
+file arch/arm/arm32/irq_dispatch.S
+
+file arch/arm/nvidia/tegra_soc.c
+file arch/arm/nvidia/tegra_space.c
+file arch/arm/arm/bus_space_a4x.S
+file arch/arm/nvidia/soc_tegra124.c soc_tegra124
+
+# On-board I/O
+device tegraio { [port=-1] } : bus_space_generic
+attach tegraio at mainbus with tegra_io
+file arch/arm/nvidia/tegra_io.c tegra_io
+
+# Memory controller
+device tegramc
+attach tegramc at tegraio with tegra_mc
+file arch/arm/nvidia/tegra_mc.c tegra_mc
+
+# Power management controller
+device tegrapmc
+attach tegrapmc at tegraio with tegra_pmc
+file arch/arm/nvidia/tegra_pmc.c tegra_pmc
+
+# UART
+attach com at tegraio with tegra_com
+file arch/arm/nvidia/tegra_com.c tegra_com needs-flag
+
+# USB 2.0
+attach ehci at tegraio with tegra_ehci
+file arch/arm/nvidia/tegra_ehci.c tegra_ehci
+
+# SDMMC
+attach sdhc at tegraio with tegra_sdhc
+file arch/arm/nvidia/tegra_sdhc.c tegra_sdhc
+
+# SATA
+attach ahcisata at tegraio with tegra_ahcisata
+file arch/arm/nvidia/tegra_ahcisata.c tegra_ahcisata
+
+# HDA
+attach hdaudio at tegraio with tegra_hdaudio
+file arch/arm/nvidia/tegra_hdaudio.c tegra_hdaudio
+
+# Console parameters
+defparam opt_tegra.h CONADDR
+defparam opt_tegra.h CONSPEED
+defparam opt_tegra.h CONMODE
+
+# Memory parameters
+defparam opt_tegra.h MEMSIZE
+
+# SOC parameters
+defflag opt_tegra.h SOC_TEGRAK1
+defflag opt_tegra.h SOC_TEGRA124: SOC_TEGRAK1
diff -r 4b33e7aa3878 -r b88481442181 sys/arch/arm/nvidia/soc_tegra124.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/nvidia/soc_tegra124.c Sun Mar 29 10:41:59 2015 +0000
@@ -0,0 +1,57 @@
+/* $NetBSD: soc_tegra124.c,v 1.1 2015/03/29 10:41:59 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_tegra.h"
+#include "opt_multiprocessor.h"
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.1 2015/03/29 10:41:59 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/device.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <arm/cpufunc.h>
+
+#include <arm/nvidia/tegra_reg.h>
+#include <arm/nvidia/tegra_var.h>
+
+void
+tegra124_mpinit(void)
+{
+#if defined(MULTIPROCESSOR)
+ extern void cortex_mpstart(void);
+
+ arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
+
+ /* TODO */
+#endif
+}
diff -r 4b33e7aa3878 -r b88481442181 sys/arch/arm/nvidia/tegra_ahcisata.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/nvidia/tegra_ahcisata.c Sun Mar 29 10:41:59 2015 +0000
@@ -0,0 +1,90 @@
+/* $NetBSD: tegra_ahcisata.c,v 1.1 2015/03/29 10:41:59 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "locators.h"
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: tegra_ahcisata.c,v 1.1 2015/03/29 10:41:59 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+
+#include <dev/ata/atavar.h>
+#include <dev/ic/ahcisatavar.h>
+
+#include <arm/nvidia/tegra_var.h>
+
+static int tegra_ahcisata_match(device_t, cfdata_t, void *);
+static void tegra_ahcisata_attach(device_t, device_t, void *);
+
+struct tegra_ahcisata_softc {
+ struct ahci_softc sc;
+ void *sc_ih;
+};
+
+CFATTACH_DECL_NEW(tegra_ahcisata, sizeof(struct tegra_ahcisata_softc),
+ tegra_ahcisata_match, tegra_ahcisata_attach, NULL, NULL);
+
+static int
+tegra_ahcisata_match(device_t parent, cfdata_t cf, void *aux)
+{
+ return 1;
+}
+
+static void
+tegra_ahcisata_attach(device_t parent, device_t self, void *aux)
+{
+ struct tegra_ahcisata_softc * const sc = device_private(self);
+ struct tegraio_attach_args * const tio = aux;
+ const struct tegra_locators * const loc = &tio->tio_loc;
+
+ sc->sc.sc_atac.atac_dev = self;
+ sc->sc.sc_dmat = tio->tio_dmat;
+ sc->sc.sc_ahcit = tio->tio_bst;
+ bus_space_subregion(tio->tio_bst, tio->tio_bsh,
+ loc->loc_offset, loc->loc_size, &sc->sc.sc_ahcis);
+ sc->sc.sc_ahci_ports = 1;
+
+ aprint_naive("\n");
+ aprint_normal(": SATA\n");
+
+ sc->sc_ih = intr_establish(loc->loc_intr, IPL_BIO, IST_LEVEL,
+ ahci_intr, &sc->sc);
+ if (sc->sc_ih == NULL) {
+ aprint_error_dev(self, "couldn't establish interrupt %d\n",
+ loc->loc_intr);
+ return;
+ }
+ aprint_normal_dev(self, "interrupting on irq %d\n", loc->loc_intr);
+
+ ahci_attach(&sc->sc);
+}
diff -r 4b33e7aa3878 -r b88481442181 sys/arch/arm/nvidia/tegra_apbreg.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/nvidia/tegra_apbreg.h Sun Mar 29 10:41:59 2015 +0000
@@ -0,0 +1,87 @@
+/* $NetBSD: tegra_apbreg.h,v 1.1 2015/03/29 10:41:59 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARM_TEGRA_APBREG_H
+#define _ARM_TEGRA_APBREG_H
+
+#define APB_MISC_PP_CONFIG_CTL_0_REG 0x24
+#define APB_MISC_PP_PINMUX_GLOBAL_0_0_REG 0x40
+#define APB_MISC_PP_PULLUPDOWN_REG_C_0_REG 0xa8
+#define APB_MISC_SC1X_PADS_VIP_VCLKCTRL_0_REG 0x428
+#define APB_MISC_GP_HIDREV_0_REG 0x804
+#define APB_MISC_GP_MIPI_PAD_CTRL_0_REG 0x820
+#define APB_MISC_GP_AOCFG1PADCTRL_0_REG 0x868
+#define APB_MISC_GP_AOCFG2PADCTRL_0_REG 0x86c
+#define APB_MISC_GP_ATCFG1PADCTRL_0_REG 0x870
+#define APB_MISC_GP_ATCFG2PADCTRL_0_REG 0x874
+#define APB_MISC_GP_ATCFG3PADCTRL_0_REG 0x878
+#define APB_MISC_GP_ATCFG4PADCTRL_0_REG 0x87c
+#define APB_MISC_GP_ATCFG5PADCTRL_0_REG 0x880
+#define APB_MISC_GP_CDEV1CFGPADCTRL_0_REG 0x884
+#define APB_MISC_GP_CDEV2CFGPADCTRL_0_REG 0x888
+#define APB_MISC_GP_DAP1CFGPADCTRL_0_REG 0x890
+#define APB_MISC_GP_DAP2CFGPADCTRL_0_REG 0x894
+#define APB_MISC_GP_DAP3CFGPADCTRL_0_REG 0x898
+#define APB_MISC_GP_DAP4CFGPADCTRL_0_REG 0x89c
+#define APB_MISC_GP_DBGCFGPADCTRL_0_REG 0x8a0
+#define APB_MISC_GP_SDIO3CFGPADCTRL_0_REG 0x8b0
+#define APB_MISC_GP_SPICFGPADCTRL_0_REG 0x8b4
+#define APB_MISC_GP_UAACFGPADCTRL_0_REG 0x8b8
+#define APB_MISC_GP_UABCFGPADCTRL_0_REG 0x8bc
+#define APB_MISC_GP_UART2CFGPADCTRL_0_REG 0x8c0
+#define APB_MISC_GP_UART3CFGPADCTRL_0_REG 0x8c4
+#define APB_MISC_GP_SDIO1CFGPADCTRL_0_REG 0x8ec
+#define APB_MISC_GP_DDCCFGPADCTRL_0_REG 0x8fc
+#define APB_MISC_GP_GMCAFGPADCTRL_0_REG 0x900
+#define APB_MISC_GP_GMECFGPADCTRL_0_REG 0x910
+#define APB_MISC_GP_GMFCFGPADCTRL_0_REG 0x914
+#define APB_MISC_GP_GMGCFGPADCTRL_0_REG 0x918
+#define APB_MISC_GP_GMHCFGPADCTRL_0_REG 0x91c
+#define APB_MISC_GP_OWRCFGPADCTRL_0_REG 0x920
+#define APB_MISC_GP_UADCFGPADCTRL_0_REG 0x924
+#define APB_MISC_GP_GPVCFGPADCTRL_0_REG 0x928
+#define APB_MISC_GP_DEV3CFGPADCTRL_0_REG 0x92c
+#define APB_MISC_GP_CECCFGPADCTRL_0_REG 0x938
+#define APB_MISC_GP_ATCFG6PADCTRL_0_REG 0x994
+#define APB_MISC_GP_DAP5CFGPADCTRL_0_REG 0x998
+#define APB_MISC_GP_USB_VBUS_EN_CFGPADCTRL_0_REG 0x99c
+#define APB_MISC_GP_AOCFG3PADCTRL_0_REG 0x9a8
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