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[src/trunk]: src/sys/arch/riscv/riscv Accept the one instruction penalty and ...
details: https://anonhg.NetBSD.org/src/rev/e8af0213a617
branches: trunk
changeset: 337054:e8af0213a617
user: matt <matt%NetBSD.org@localhost>
date: Tue Mar 31 11:53:13 2015 +0000
description:
Accept the one instruction penalty and just use PTR_LA instead of doing
the relocs ourselves.
diffstat:
sys/arch/riscv/riscv/locore.S | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diffs (24 lines):
diff -r d060fc14dcf2 -r e8af0213a617 sys/arch/riscv/riscv/locore.S
--- a/sys/arch/riscv/riscv/locore.S Tue Mar 31 11:48:10 2015 +0000
+++ b/sys/arch/riscv/riscv/locore.S Tue Mar 31 11:53:13 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.4 2015/03/31 11:48:10 matt Exp $ */
+/* $NetBSD: locore.S,v 1.5 2015/03/31 11:53:13 matt Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -78,10 +78,10 @@
call memset // zero through kernel_end
// As a temporary hack, word 0 contains the amount of memory in MB
- INT_L a7, (zero) // load memory size
- slli a7, a7, (20-PGSHIFT) // convert MB to pages
-.L01: auipc t0, %pcrel_hi(physmem)
- INT_S a7, %pcrel_lo(.L01)(t0) // store it in physmem
+ INT_L a7, (zero) // load memory size
+ slli a7, a7, (20-PGSHIFT) // convert MB to pages
+.L01: PTR_LA t0, physmem
+ INT_S a7, (t0) // store it in physmem
li t4, PTE_V | PTE_SX | PTE_SW | PTE_SR | PTE_G
#ifdef _LP64
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