[src/trunk]: src/sys/arch/arm/cortex All SGIs are MPSAFE so establish them as...

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/208599cf44ba
branches:  trunk
changeset: 337273:208599cf44ba
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Apr 09 00:38:29 2015 +0000

description:
All SGIs are MPSAFE so establish them as such.

diffstat:

 sys/arch/arm/cortex/gic.c |  40 ++++++++++++++++++++--------------------
 1 files changed, 20 insertions(+), 20 deletions(-)

diffs (70 lines):

diff -r d2b60ecd1e82 -r 208599cf44ba sys/arch/arm/cortex/gic.c
--- a/sys/arch/arm/cortex/gic.c Wed Apr 08 21:43:30 2015 +0000
+++ b/sys/arch/arm/cortex/gic.c Thu Apr 09 00:38:29 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: gic.c,v 1.16 2015/03/20 07:57:27 skrll Exp $   */
+/*     $NetBSD: gic.c,v 1.17 2015/04/09 00:38:29 matt Exp $    */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -34,7 +34,7 @@
 #define _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.16 2015/03/20 07:57:27 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.17 2015/04/09 00:38:29 matt Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -597,33 +597,33 @@
                }
        }
 #ifdef __HAVE_PIC_FAST_SOFTINTS
-       intr_establish(SOFTINT_BIO, IPL_SOFTBIO, IST_EDGE,
+       intr_establish(SOFTINT_BIO, IPL_SOFTBIO, IST_MPSAFE | IST_EDGE,
            pic_handle_softint, (void *)SOFTINT_BIO);
-       intr_establish(SOFTINT_CLOCK, IPL_SOFTCLOCK, IST_EDGE,
+       intr_establish(SOFTINT_CLOCK, IPL_SOFTCLOCK, IST_MPSAFE | IST_EDGE,
            pic_handle_softint, (void *)SOFTINT_CLOCK);
-       intr_establish(SOFTINT_NET, IPL_SOFTNET, IST_EDGE,
+       intr_establish(SOFTINT_NET, IPL_SOFTNET, IST_MPSAFE | IST_EDGE,
            pic_handle_softint, (void *)SOFTINT_NET);
-       intr_establish(SOFTINT_SERIAL, IPL_SOFTSERIAL, IST_EDGE,
+       intr_establish(SOFTINT_SERIAL, IPL_SOFTSERIAL, IST_MPSAFE | IST_EDGE,
            pic_handle_softint, (void *)SOFTINT_SERIAL);
 #endif
 #ifdef MULTIPROCESSOR
-       intr_establish(ARMGIC_SGI_IPIBASE + IPI_AST, IPL_VM, IST_EDGE,
-           pic_ipi_nop, (void *)-1);
-       intr_establish(ARMGIC_SGI_IPIBASE + IPI_XCALL, IPL_VM, IST_EDGE,
-           pic_ipi_xcall, (void *)-1);
-       intr_establish(ARMGIC_SGI_IPIBASE + IPI_GENERIC, IPL_VM, IST_EDGE,
-           pic_ipi_generic, (void *)-1);
-       intr_establish(ARMGIC_SGI_IPIBASE + IPI_NOP, IPL_VM, IST_EDGE,
-           pic_ipi_nop, (void *)-1);
-       intr_establish(ARMGIC_SGI_IPIBASE + IPI_SHOOTDOWN, IPL_VM, IST_EDGE,
-           pic_ipi_shootdown, (void *)-1);
+       intr_establish(ARMGIC_SGI_IPIBASE + IPI_AST, IPL_VM,
+           IST_MPSAFE | IST_EDGE, pic_ipi_nop, (void *)-1);
+       intr_establish(ARMGIC_SGI_IPIBASE + IPI_XCALL, IPL_VM,
+           IST_MPSAFE | IST_EDGE, pic_ipi_xcall, (void *)-1);
+       intr_establish(ARMGIC_SGI_IPIBASE + IPI_GENERIC, IPL_VM,
+           IST_MPSAFE | IST_EDGE, pic_ipi_generic, (void *)-1);
+       intr_establish(ARMGIC_SGI_IPIBASE + IPI_NOP, IPL_VM,
+           IST_MPSAFE | IST_EDGE, pic_ipi_nop, (void *)-1);
+       intr_establish(ARMGIC_SGI_IPIBASE + IPI_SHOOTDOWN, IPL_VM,
+           IST_MPSAFE | IST_EDGE, pic_ipi_shootdown, (void *)-1);
 #ifdef DDB
-       intr_establish(ARMGIC_SGI_IPIBASE + IPI_DDB, IPL_HIGH, IST_EDGE,
-           pic_ipi_ddb, NULL);
+       intr_establish(ARMGIC_SGI_IPIBASE + IPI_DDB, IPL_HIGH,
+           IST_MPSAFE | IST_EDGE, pic_ipi_ddb, NULL);
 #endif
 #ifdef __HAVE_PREEMPTION
-       intr_establish(ARMGIC_SGI_IPIBASE + IPI_KPREEMPT, IPL_VM, IST_EDGE,
-           pic_ipi_nop, (void *)-1);
+       intr_establish(ARMGIC_SGI_IPIBASE + IPI_KPREEMPT, IPL_VM,
+           IST_MPSAFE | IST_EDGE, pic_ipi_nop, (void *)-1);
 #endif
        armgic_cpu_init(&sc->sc_pic, curcpu());
 #endif