[src/trunk]: src/sys/arch/arm/arm don't call L2 maintance function if L2 cach...

[hsuenaga <hsuenaga%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ec94041e24a5
branches:  trunk
changeset: 337505:ec94041e24a5
user:      hsuenaga <hsuenaga%NetBSD.org@localhost>
date:      Fri Apr 17 13:39:01 2015 +0000

description:
don't call L2 maintance function if L2 cache is disabled.

diffstat:

 sys/arch/arm/arm/cpufunc.c |  8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diffs (29 lines):

diff -r 84543411cc51 -r ec94041e24a5 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Fri Apr 17 13:16:01 2015 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Fri Apr 17 13:39:01 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.152 2015/04/15 10:52:18 hsuenaga Exp $   */
+/*     $NetBSD: cpufunc.c,v 1.153 2015/04/17 13:39:01 hsuenaga Exp $   */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.152 2015/04/15 10:52:18 hsuenaga Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.153 2015/04/17 13:39:01 hsuenaga Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -1381,7 +1381,9 @@
        .cf_dcache_inv_range    = armv7_dcache_inv_range,
        .cf_dcache_wb_range     = armv7_dcache_wb_range,
 
-#if !defined(AURORA_IO_CACHE_COHERENCY) && defined(ARMADAXP)
+#if defined(L2CACHE_ENABLE) && \
+    !defined(AURORA_IO_CACHE_COHERENCY) && \
+    defined(ARMADAXP)
        .cf_sdcache_wbinv_range = armadaxp_sdcache_wbinv_range,
        .cf_sdcache_inv_range   = armadaxp_sdcache_inv_range,
        .cf_sdcache_wb_range    = armadaxp_sdcache_wb_range,