[src/trunk]: src/sys/arch/arm/broadcom Make the DMA halt procedure follow bet...

[mlelstv <mlelstv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/0de63a66a3ec
branches:  trunk
changeset: 339777:0de63a66a3ec
user:      mlelstv <mlelstv%NetBSD.org@localhost>
date:      Sun Aug 09 13:07:47 2015 +0000

description:
Make the DMA halt procedure follow better the documentation.

diffstat:

 sys/arch/arm/broadcom/bcm2835_dmac.c |  22 +++++++++++++++++-----
 1 files changed, 17 insertions(+), 5 deletions(-)

diffs (53 lines):

diff -r d0f682c78f9a -r 0de63a66a3ec sys/arch/arm/broadcom/bcm2835_dmac.c
--- a/sys/arch/arm/broadcom/bcm2835_dmac.c      Sun Aug 09 13:06:44 2015 +0000
+++ b/sys/arch/arm/broadcom/bcm2835_dmac.c      Sun Aug 09 13:07:47 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_dmac.c,v 1.13 2015/08/09 13:06:44 mlelstv Exp $ */
+/* $NetBSD: bcm2835_dmac.c,v 1.14 2015/08/09 13:07:47 mlelstv Exp $ */
 
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
 #include "opt_ddb.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_dmac.c,v 1.13 2015/08/09 13:06:44 mlelstv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_dmac.c,v 1.14 2015/08/09 13:07:47 mlelstv Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -237,9 +237,9 @@
 
        bcm_dmac_halt(ch);
 
+       /* reset chip */
        val = DMAC_READ(sc, DMAC_CS(ch->ch_index));
        val |= DMAC_CS_RESET;
-       val |= DMAC_CS_ABORT;
        val &= ~DMAC_CS_ACTIVE;
        DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);
 
@@ -279,9 +279,21 @@
 bcm_dmac_halt(struct bcm_dmac_channel *ch)
 {
        struct bcm_dmac_softc *sc = ch->ch_sc;
+       uint32_t val;
 
-       DMAC_WRITE(sc, DMAC_CS(ch->ch_index), DMAC_CS_RESET|DMAC_CS_ABORT);
-       bcm_dmac_set_conblk_addr(ch, 0);
+       /* pause DMA */
+       val = DMAC_READ(sc, DMAC_CS(ch->ch_index));
+       val &= ~DMAC_CS_ACTIVE;
+       DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);
+
+       /* wait for paused state ? */
+
+       /* end descriptor chain */
+       DMAC_WRITE(sc, DMAC_NEXTCONBK(ch->ch_index), 0);
+
+       /* resume DMA that then stops */
+       val |= DMAC_CS_ACTIVE | DMAC_CS_ABORT;
+       DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);
 }
 
 #if defined(DDB)