[src/trunk]: src/sys/dev/sbus fix some tpyos, add some comments

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/414371334497
branches:  trunk
changeset: 344805:414371334497
user:      macallan <macallan%NetBSD.org@localhost>
date:      Thu Apr 21 18:24:02 2016 +0000

description:
fix some tpyos, add some comments

diffstat:

 sys/dev/sbus/cgtwelve.c    |   6 +++---
 sys/dev/sbus/cgtwelvereg.h |  12 +++++++-----
 2 files changed, 10 insertions(+), 8 deletions(-)

diffs (80 lines):

diff -r df6b08a90df3 -r 414371334497 sys/dev/sbus/cgtwelve.c
--- a/sys/dev/sbus/cgtwelve.c   Thu Apr 21 18:10:57 2016 +0000
+++ b/sys/dev/sbus/cgtwelve.c   Thu Apr 21 18:24:02 2016 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cgtwelve.c,v 1.5 2012/01/11 16:08:57 macallan Exp $ */
+/*     $NetBSD: cgtwelve.c,v 1.6 2016/04/21 18:24:02 macallan Exp $ */
 
 /*-
  * Copyright (c) 2010 Michael Lorenz
@@ -29,7 +29,7 @@
 /* a console driver for the Sun CG12 / Matrox SG3 graphics board */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cgtwelve.c,v 1.5 2012/01/11 16:08:57 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cgtwelve.c,v 1.6 2016/04/21 18:24:02 macallan Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -422,7 +422,7 @@
                cgtwelve_select_ovl(sc, CG12_SEL_OVL);
                memset(sc->sc_fbaddr, 0, 0x20000);
 
-               /* and make sure we can write the 24bit fb */
+               /* and make sure we can write the 8bit fb */
                cgtwelve_select_ovl(sc, CG12_SEL_8BIT);
                break;
        case 24:
diff -r df6b08a90df3 -r 414371334497 sys/dev/sbus/cgtwelvereg.h
--- a/sys/dev/sbus/cgtwelvereg.h        Thu Apr 21 18:10:57 2016 +0000
+++ b/sys/dev/sbus/cgtwelvereg.h        Thu Apr 21 18:24:02 2016 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cgtwelvereg.h,v 1.2 2010/04/14 04:37:11 macallan Exp $ */
+/*     $NetBSD: cgtwelvereg.h,v 1.3 2016/04/21 18:24:02 macallan Exp $ */
 
 /*-
  * Copyright (c) 2010 Michael Lorenz
@@ -156,7 +156,7 @@
 #define                DWGCTL_AUTOLINE_OPEN    0x00000001
 #define                DWGCTL_LINE_CLOSED      0x00000002
 #define                DWGCTL_AUTOLINE_CLOSED  0x00000003
-#define                DWGCTL_TRAPEXOID        0x00000004
+#define                DWGCTL_TRAPEZOID        0x00000004
 #define                DWGCTL_BITBLT           0x00000008
 #define                DWGCTL_UPLOAD           0x00000009
 #define                DWGCTL_DOWNLOAD         0x0000000a
@@ -181,7 +181,7 @@
 #define                DWGCTL_BLT_TRANSPARENT  0x40000000      /* for color exp. */
 
 #define CG12APU_SAM            0x0274
-#define CG12APU_SGN            0x0278
+#define CG12APU_SGN            0x0278  /* analog to Athena's SIGN register? */
 #define CG12APU_LENGTH         0x027c
 #define CG12APU_DWG_R0         0x0280
 #define CG12APU_DWG_R1         0x0284
@@ -193,7 +193,7 @@
 #define CG12APU_DWG_R7         0x029c
 #define CG12APU_RELOAD_CTL     0x02a0
 #define CG12APU_RELOAD_STB     0x02a4
-#define CG12APU_C_XLEFT                0x02a8
+#define CG12APU_C_XLEFT                0x02a8  /* clipping? */
 #define CG12APU_C_YTOP         0x02ac
 #define CG12APU_C_XRIGHT       0x02b0
 #define CG12APU_C_YBOTTOM      0x02b4
@@ -270,7 +270,7 @@
 #define        CG12_WID_ENABLE_3       3       /* overlay/cursor enable has 3 colors */
 #define        CG12_WID_ALT_CMAP       4       /* use alternate colormap       */
 #define        CG12_WID_DBL_BUF_DISP_A 5       /* double buffering display A   */
-#define        CG12_WID_DBL_BUF_DISP_B 6       /* double buffering display A   */
+#define        CG12_WID_DBL_BUF_DISP_B 6       /* double buffering display B   */
 #define        CG12_WID_ATTRS          7       /* total no of attributes       */
 
 /* WSC */
@@ -293,5 +293,7 @@
 #define CG12_EIC_DCLONGR       0x0730
 #define CG12_EIC_DCFLOATR      0x0734
 #define CG12_EIC_RESET         0x073c
+#define        CG12EIC_RESET_SYS       0x01000000
+#define        CG12EIC_RESET_DSP       0x02000000
 
 #endif /* CG12REG_H */