[src/trunk]: src/sys/arch/arm/omap Print OMAP3 ChipID.

[kiyohara <kiyohara%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/5662ecf1dff8
branches:  trunk
changeset: 344865:5662ecf1dff8
user:      kiyohara <kiyohara%NetBSD.org@localhost>
date:      Mon Apr 25 13:07:03 2016 +0000

description:
Print OMAP3 ChipID.

diffstat:

 sys/arch/arm/omap/omap2_reg.h |   8 +++++++-
 sys/arch/arm/omap/omap3_scm.c |  33 +++++++++++++++++++++++++++++++--
 2 files changed, 38 insertions(+), 3 deletions(-)

diffs (97 lines):

diff -r d6fb645a1e7c -r 5662ecf1dff8 sys/arch/arm/omap/omap2_reg.h
--- a/sys/arch/arm/omap/omap2_reg.h     Mon Apr 25 10:55:01 2016 +0000
+++ b/sys/arch/arm/omap/omap2_reg.h     Mon Apr 25 13:07:03 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: omap2_reg.h,v 1.30 2015/06/06 14:00:32 jmcneill Exp $ */
+/* $NetBSD: omap2_reg.h,v 1.31 2016/04/25 13:07:03 kiyohara Exp $ */
 
 /*
  * Copyright (c) 2007 Microsoft
@@ -141,6 +141,12 @@
 #define        TI_DM37XX_L4_EMULATION_BASE     0x54000000
 #define        TI_DM37XX_L4_EMULATION_SIZE     0x00800000      /* 8MB */
 
+
+#define CHIPID_OMAP3503                0x5c00
+#define CHIPID_OMAP3515                0x1c00
+#define CHIPID_OMAP3525                0x4c00
+#define CHIPID_OMAP3530                0x0c00
+
 /*
  * Clock Management registers base, offsets, and size
  */
diff -r d6fb645a1e7c -r 5662ecf1dff8 sys/arch/arm/omap/omap3_scm.c
--- a/sys/arch/arm/omap/omap3_scm.c     Mon Apr 25 10:55:01 2016 +0000
+++ b/sys/arch/arm/omap/omap3_scm.c     Mon Apr 25 13:07:03 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: omap3_scm.c,v 1.2 2013/03/13 03:08:17 khorben Exp $ */
+/* $NetBSD: omap3_scm.c,v 1.3 2016/04/25 13:07:03 kiyohara Exp $ */
 
 /*-
  * Copyright (c) 2013 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap3_scm.c,v 1.2 2013/03/13 03:08:17 khorben Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omap3_scm.c,v 1.3 2016/04/25 13:07:03 kiyohara Exp $");
 
 #include "opt_omap.h"
 
@@ -67,6 +67,8 @@
 #define CONTROL_TEMP_SENSOR_EOCZ       __BIT(7)
 #define CONTROL_TEMP_SENSOR_TEMP_MASK  __BITS(6,0)
 
+#define CONTROL_OMAP_STATUS            0x44c
+
 /* CONTROL_TEMP_SENSOR TEMP bits to tenths of a degree */
 static const int omap3_scm_adc2temp[128] = {
        -400, -400, -400, -400, -400,
@@ -103,6 +105,8 @@
        bus_space_tag_t         sc_iot;
        bus_space_handle_t      sc_ioh;
 
+       uint32_t                sc_cid;
+
        /* GENERAL */
        struct sysmon_envsys    *sc_sme;
        envsys_data_t           sc_sensor;
@@ -140,6 +144,8 @@
        struct omap3_scm_softc *sc = device_private(self);
        struct obio_attach_args *obio = opaque;
        uint32_t rev;
+       char buf[256];
+       const char *cid;
 
        aprint_naive("\n");
 
@@ -156,6 +162,29 @@
 
        rev = SCM_READ_REG(sc, CONTROL_REVISION);
        aprint_normal(": rev. 0x%x\n", rev & 0xff);
+       sc->sc_cid = SCM_READ_REG(sc, CONTROL_OMAP_STATUS & 0xffff);
+       switch (sc->sc_cid) {
+       case CHIPID_OMAP3503:   cid = "OMAP3503";       break;
+       case CHIPID_OMAP3515:   cid = "OMAP3515";       break;
+       case CHIPID_OMAP3525:   cid = "OMAP3525";       break;
+       case CHIPID_OMAP3530:   cid = "OMAP3530";       break;
+       default:                cid = "unknwon";        break;
+       }
+       aprint_normal_dev(self, "%s: ", cid);
+       snprintb(buf, sizeof(buf), "\177\020"
+           "b\0TO_OUT\0"
+           "b\1four_bit_mmc\0"
+           "b\2CCP2_CSI1\0"
+           "b\3CMADS_FL3G\0"
+           "b\4NEON_VFPLite\0"
+           "b\5ISP_disable\0"
+           "f\6\2IVA2_MHz\0=\0 430\0=\2 266\0"
+           "f\10\2ARM_MHz\0=\0 600\0=\1 400\0=\2 266\0"
+           "f\12\2MPU_L2_cache_size\0=\0 0KB\0=\1 64KB\0=\2 128KB\0=\3 Full\0"
+           "b\14IVA_disable_acc\0"
+           "f\15\2SGX_scalable_control\0=\0Full\0=\1Half\0=\2not-present\0\0",
+           sc->sc_cid);
+       aprint_normal("%s\n", buf);
 
        omap3_scm_sensor_attach(sc);
 }