[src/trunk]: src/sys/arch/arm/include No need to shout

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9f2fdef2bede
branches:  trunk
changeset: 341037:9f2fdef2bede
user:      skrll <skrll%NetBSD.org@localhost>
date:      Thu Oct 15 07:14:56 2015 +0000

description:
No need to shout

diffstat:

 sys/arch/arm/include/armreg.h |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r 473587063725 -r 9f2fdef2bede sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Thu Oct 15 07:13:50 2015 +0000
+++ b/sys/arch/arm/include/armreg.h     Thu Oct 15 07:14:56 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.108 2015/10/15 07:13:50 skrll Exp $       */
+/*     $NetBSD: armreg.h,v 1.109 2015/10/15 07:14:56 skrll Exp $       */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -459,7 +459,7 @@
 /* Cortex-A15 Auxiliary Control Register (CP15 register 1, opcode 1) */
 #define        CORTEXA15_ACTLR_BTB     __BIT(0)  /* Cache and TLB updates broadcast */
 #define        CORTEXA15_ACTLR_SMP     __BIT(6)  /* SMP */
-#define        CORTEXA15_ACTLR_IOBEU   __BIT(15) /* In order issue in Branch Exec UNIT */
+#define        CORTEXA15_ACTLR_IOBEU   __BIT(15) /* In order issue in Branch Exec Unit */
 
 /* Marvell Feroceon Extra Features Register (CP15 register 1, opcode2 0) */
 #define FC_DCACHE_REPL_LOCK    0x80000000 /* Replace DCache Lock */