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[src/trunk]: src/sys/arch/sparc64/dev Set the target JPID for all interrupts ...
details: https://anonhg.NetBSD.org/src/rev/c9902d842b61
branches: trunk
changeset: 341805:c9902d842b61
user: jdc <jdc%NetBSD.org@localhost>
date: Mon Nov 23 21:40:14 2015 +0000
description:
Set the target JPID for all interrupts on Tomatillo.
If the "ino-bitmap" property is available, use it to route error interrupts.
Minor cosmetic changes.
Add register printing when DEBUG is defined.
diffstat:
sys/arch/sparc64/dev/schizo.c | 244 ++++++++++++++++++++++++++++++++++++--
sys/arch/sparc64/dev/schizoreg.h | 170 ++++++++++++++++++++++++++-
sys/arch/sparc64/dev/schizovar.h | 14 ++-
3 files changed, 407 insertions(+), 21 deletions(-)
diffs (truncated from 568 to 300 lines):
diff -r 7c9b41bcda98 -r c9902d842b61 sys/arch/sparc64/dev/schizo.c
--- a/sys/arch/sparc64/dev/schizo.c Mon Nov 23 19:56:47 2015 +0000
+++ b/sys/arch/sparc64/dev/schizo.c Mon Nov 23 21:40:14 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: schizo.c,v 1.33 2015/10/02 05:22:52 msaitoh Exp $ */
+/* $NetBSD: schizo.c,v 1.34 2015/11/23 21:40:14 jdc Exp $ */
/* $OpenBSD: schizo.c,v 1.55 2008/08/18 20:29:37 brad Exp $ */
/*
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: schizo.c,v 1.33 2015/10/02 05:22:52 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: schizo.c,v 1.34 2015/11/23 21:40:14 jdc Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -74,6 +74,10 @@
static void schizo_attach(device_t, device_t, void *);
static int schizo_print(void *aux, const char *p);
+#ifdef DEBUG
+void schizo_print_regs(int unit, int what);
+#endif
+
CFATTACH_DECL_NEW(schizo, sizeof(struct schizo_softc),
schizo_match, schizo_attach, NULL, NULL);
@@ -143,8 +147,8 @@
struct schizo_pbm *pbm;
struct iommu_state *is;
struct pcibus_attach_args pba;
- uint64_t reg, eccctrl;
- int *busranges = NULL, nranges;
+ uint64_t reg, eccctrl, ino_bitmap;
+ int *busranges = NULL, nranges, *ino_bitmaps = NULL, nbitmaps;
char *str;
bool no_sc;
@@ -180,6 +184,9 @@
if (pbm == NULL)
panic("schizo: can't alloc schizo pbm");
+#ifdef DEBUG
+ sc->sc_pbm = pbm;
+#endif
pbm->sp_sc = sc;
pbm->sp_regt = sc->sc_bustag;
@@ -194,11 +201,25 @@
if (bus_space_map(sc->sc_bustag, ma->ma_reg[0].ur_paddr,
ma->ma_reg[0].ur_len,
BUS_SPACE_MAP_LINEAR, &pbm->sp_intrh)) {
- aprint_error(": failed to interrupt map registers\n");
+ aprint_error(": failed to map interrupt registers\n");
kmem_free(pbm, sizeof(*pbm));
return;
}
+#ifdef DEBUG
+ /*
+ * Map ichip registers
+ */
+ if (sc->sc_tomatillo)
+ if (bus_space_map(sc->sc_bustag, ma->ma_reg[3].ur_paddr,
+ ma->ma_reg[3].ur_len,
+ BUS_SPACE_MAP_LINEAR, &pbm->sp_ichiph)) {
+ aprint_error(": failed to map ichip registers\n");
+ kmem_free(pbm, sizeof(*pbm));
+ return;
+ }
+#endif
+
if (prom_getprop(sc->sc_node, "ranges", sizeof(struct schizo_range),
&pbm->sp_nrange, (void **)&pbm->sp_range))
panic("schizo: can't get ranges");
@@ -207,7 +228,7 @@
(void **)&busranges))
panic("schizo: can't get bus-range");
- aprint_normal(": \"%s\", version %d, ign %x, bus %c %d to %d\n",
+ aprint_normal(": %s, version %d, ign %x, bus %c %d to %d\n",
sc->sc_tomatillo ? "Tomatillo" : "Schizo", sc->sc_ver,
sc->sc_ign, pbm->sp_bus_a ? 'A' : 'B', busranges[0], busranges[1]);
aprint_naive("\n");
@@ -304,20 +325,34 @@
SCZ_PCIDIAG_D_INTSYNC);
schizo_pbm_write(pbm, SCZ_PCI_DIAG, reg);
- if (pbm->sp_bus_a)
+ if (prom_getprop(sc->sc_node, "ino-bitmap", sizeof(int), &nbitmaps,
+ (void **)&ino_bitmaps)) {
+ /* No property - set defaults (double map UE, CE, SERR). */
+ if (pbm->sp_bus_a)
+ ino_bitmap = 1UL << SCZ_PCIERR_A_INO;
+ else
+ ino_bitmap = 1UL << SCZ_PCIERR_B_INO;
+ ino_bitmap |= (1UL << SCZ_UE_INO) | (1UL << SCZ_CE_INO) |
+ (1UL << SCZ_SERR_INO);
+ } else
+ ino_bitmap = (uint64_t) ino_bitmaps[1] << 32 | ino_bitmaps[0];
+ DPRINTF(SDB_INTR, ("ino_bitmap=0x%016" PRIx64 "\n", ino_bitmap));
+
+ if (ino_bitmap & (1UL << SCZ_PCIERR_A_INO))
schizo_set_intr(sc, pbm, PIL_HIGH, schizo_pci_error,
pbm, SCZ_PCIERR_A_INO, "pci_a");
- else
+ if (ino_bitmap & (1UL << SCZ_PCIERR_B_INO))
schizo_set_intr(sc, pbm, PIL_HIGH, schizo_pci_error,
pbm, SCZ_PCIERR_B_INO, "pci_b");
-
- /* double mapped */
- schizo_set_intr(sc, pbm, PIL_HIGH, schizo_ue, sc, SCZ_UE_INO,
- "ue");
- schizo_set_intr(sc, pbm, PIL_HIGH, schizo_ce, sc, SCZ_CE_INO,
- "ce");
- schizo_set_intr(sc, pbm, PIL_HIGH, schizo_safari_error, sc,
- SCZ_SERR_INO, "safari");
+ if (ino_bitmap & (1UL << SCZ_UE_INO))
+ schizo_set_intr(sc, pbm, PIL_HIGH, schizo_ue, sc, SCZ_UE_INO,
+ "ue");
+ if (ino_bitmap & (1UL << SCZ_CE_INO))
+ schizo_set_intr(sc, pbm, PIL_HIGH, schizo_ce, sc, SCZ_CE_INO,
+ "ce");
+ if (ino_bitmap & (1UL << SCZ_SERR_INO))
+ schizo_set_intr(sc, pbm, PIL_HIGH, schizo_safari_error, sc,
+ SCZ_SERR_INO, "safari");
if (sc->sc_tomatillo) {
/*
@@ -570,6 +605,7 @@
schizo_pbm_write(pbm, mapoff,
ih->ih_number | INTMAP_V | (CPU_UPAID << INTMAP_TID_SHIFT));
+ schizo_pbm_write(pbm, clroff, 0);
}
bus_space_tag_t
@@ -758,8 +794,9 @@
struct schizo_pbm *pbm = pa->pa_pc->cookie;
struct schizo_softc *sc = pbm->sp_sc;
+ DPRINTF(SDB_INTMAP, ("IGN %x", *ihp));
*ihp |= sc->sc_ign;
- DPRINTF(SDB_INTMAP, ("returning IGN adjusted to %x\n", *ihp));
+ DPRINTF(SDB_INTMAP, (" adjusted to %x\n", *ihp));
return (0);
}
@@ -782,7 +819,7 @@
if (ih == NULL)
return (NULL);
- DPRINTF(SDB_INTR, ("\n%s: ihandle %d level %d fn %p arg %p\n", __func__,
+ DPRINTF(SDB_INTR, ("\n%s: ihandle %x level %d fn %p arg %p\n", __func__,
ihandle, level, handler, arg));
if (level == IPL_NONE)
@@ -837,6 +874,7 @@
DPRINTF(SDB_INTR, ("; read intrmap = %016qx",
(unsigned long long)imap));
imap |= INTMAP_V;
+ imap |= (CPU_UPAID << INTMAP_TID_SHIFT);
DPRINTF(SDB_INTR, ("; addr of intrmapptr = %p", intrmapptr));
DPRINTF(SDB_INTR, ("; writing intrmap = %016qx\n",
(unsigned long long)imap));
@@ -867,3 +905,173 @@
DPRINTF(SDB_INTR, ("; returning handle %p\n", cookie));
return (cookie);
}
+
+#ifdef DEBUG
+void
+schizo_print_regs(int unit, int what)
+{
+ device_t dev;
+ struct schizo_softc *sc;
+ struct schizo_pbm *pbm;
+ const struct schizo_regname *r;
+ int i;
+ u_int64_t reg;
+
+ dev = device_find_by_driver_unit("schizo", unit);
+ if (dev == NULL) {
+ printf("Can't find device schizo%d\n", unit);
+ return;
+ }
+
+ if (!what) {
+ printf("0x01: Safari registers\n");
+ printf("0x02: PCI registers\n");
+ printf("0x04: Scratch pad registers (Tomatillo only)\n");
+ printf("0x08: IOMMU registers\n");
+ printf("0x10: Streaming cache registers (Schizo only)\n");
+ printf("0x20: Interrupt registers\n");
+ printf("0x40: I-chip registers (Tomatillo only)\n");
+ return;
+ }
+ sc = device_private(dev);
+ pbm = sc->sc_pbm;
+ printf("%s (leaf %c) registers:\n", device_xname(sc->sc_dev),
+ pbm->sp_bus_a ? 'A' : 'B');
+
+ printf(" Safari registers:\n");
+ if (what & 0x01) {
+ for (r = schizo_regnames; r->size != 0; ++r)
+ for (i = 0; i <= r->n_reg; i += r->size) {
+ if ((!sc->sc_tomatillo &&
+ !(r->type & REG_TYPE_SCHIZO)) ||
+ (sc->sc_tomatillo &&
+ !(r->type & REG_TYPE_TOMATILLO)))
+ continue;
+ switch (r->size) {
+ case 1:
+ reg = schizo_read_1(sc, r->offset + i);
+ break;
+ case 8:
+ /* fallthrough */
+ default:
+ reg = schizo_read(sc, r->offset + i);
+ break;
+ }
+ printf("0x%06" PRIx64 " = 0x%016" PRIx64 " (%s",
+ r->offset + i, reg, r->name);
+ if (r->n_reg)
+ printf(" %d)\n", i / r->size);
+ else
+ printf(")\n");
+ }
+ }
+
+ if (what & 0x02) {
+ printf(" PCI registers:\n");
+ for (r = schizo_pbm_regnames; r->size != 0; ++r)
+ for (i = 0; i <= r->n_reg; i += r->size) {
+ if ((!sc->sc_tomatillo &&
+ !(r->type & REG_TYPE_SCHIZO)) ||
+ (sc->sc_tomatillo &&
+ !(r->type & REG_TYPE_TOMATILLO)))
+ continue;
+ if ((pbm->sp_bus_a &&
+ !(r->type & REG_TYPE_LEAF_A)) ||
+ (!pbm->sp_bus_a &&
+ !(r->type & REG_TYPE_LEAF_B)))
+ continue;
+ reg = schizo_pbm_read(pbm, r->offset + i);
+ printf("0x%06" PRIx64 " = 0x%016" PRIx64 ""
+ " (%s", r->offset + i, reg, r->name);
+ if (r->n_reg)
+ printf(" %d)\n", i / r->size);
+ else
+ printf(")\n");
+ }
+ }
+
+ if (what & 0x04 && sc->sc_tomatillo) {
+ printf(" Scratch pad registers:\n");
+ for (r = tomatillo_scratch_regnames; r->size != 0; ++r)
+ for (i = 0; i <= r->n_reg; i += r->size) {
+ reg = schizo_pbm_read(pbm, r->offset + i);
+ printf("0x%06" PRIx64 " = 0x%016" PRIx64 ""
+ " (%s", r->offset + i, reg, r->name);
+ if (r->n_reg)
+ printf(" %d)\n", i / r->size);
+ else
+ printf(")\n");
+ }
+ }
+
+ if (what & 0x08) {
+ printf(" IOMMU registers:\n");
+ for (r = schizo_iommu_regnames; r->size != 0; ++r)
+ for (i = 0; i <= r->n_reg; i += r->size) {
+ if ((!sc->sc_tomatillo &&
+ !(r->type & REG_TYPE_SCHIZO)) ||
+ (sc->sc_tomatillo &&
+ !(r->type & REG_TYPE_TOMATILLO)))
+ continue;
+ reg = schizo_pbm_read(pbm, r->offset + i);
+ printf("0x%06" PRIx64 " = 0x%016" PRIx64 ""
+ " (%s", r->offset + i, reg, r->name);
+ if (r->n_reg)
+ printf(" %d)\n", i / r->size);
+ else
+ printf(")\n");
+ }
+ }
+
+ if (what & 0x10 && !sc->sc_tomatillo) {
+ printf(" Streaming cache registers:\n");
+ for (r = schizo_stream_regnames; r->size != 0; ++r)
+ for (i = 0; i <= r->n_reg; i += r->size) {
+ reg = schizo_pbm_read(pbm, r->offset + i);
+ printf("0x%06" PRIx64 " = 0x%016" PRIx64 ""
+ " (%s", r->offset + i, reg, r->name);
+ if (r->n_reg)
+ printf(" %d)\n", i / r->size);
+ else
+ printf(")\n");
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