[src/trunk]: src/sys/arch/arm/cortex isb between TTBCR write and TLBIALL

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d0b3b7e78557
branches:  trunk
changeset: 337757:d0b3b7e78557
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Apr 26 16:22:57 2015 +0000

description:
isb between TTBCR write and TLBIALL

diffstat:

 sys/arch/arm/cortex/a9_mpsubr.S |  4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diffs (18 lines):

diff -r c54590aa39e4 -r d0b3b7e78557 sys/arch/arm/cortex/a9_mpsubr.S
--- a/sys/arch/arm/cortex/a9_mpsubr.S   Sun Apr 26 16:11:57 2015 +0000
+++ b/sys/arch/arm/cortex/a9_mpsubr.S   Sun Apr 26 16:22:57 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: a9_mpsubr.S,v 1.32 2015/04/20 23:12:56 jmcneill Exp $  */
+/*     $NetBSD: a9_mpsubr.S,v 1.33 2015/04/26 16:22:57 jmcneill Exp $  */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -207,6 +207,8 @@
 #endif
        mcr     p15, 0, r1, c2, c0, 2   // TTBCR write
 
+       isb
+
 #if !defined(CPU_CORTEXA5)
        XPUTC(#'I')
        mov     r1, #0