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[src/trunk]: src/sys/arch add AHB_A2 to devmap, print SCTLR value in initarm
details: https://anonhg.NetBSD.org/src/rev/6114d3715234
branches: trunk
changeset: 337758:6114d3715234
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun Apr 26 16:24:01 2015 +0000
description:
add AHB_A2 to devmap, print SCTLR value in initarm
diffstat:
sys/arch/arm/nvidia/tegra_reg.h | 7 ++++---
sys/arch/evbarm/tegra/tegra_machdep.c | 32 ++++++++++++++++++++++++++++++--
2 files changed, 34 insertions(+), 5 deletions(-)
diffs (93 lines):
diff -r d0b3b7e78557 -r 6114d3715234 sys/arch/arm/nvidia/tegra_reg.h
--- a/sys/arch/arm/nvidia/tegra_reg.h Sun Apr 26 16:22:57 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_reg.h Sun Apr 26 16:24:01 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_reg.h,v 1.1 2015/03/29 10:41:59 jmcneill Exp $ */
+/* $NetBSD: tegra_reg.h,v 1.2 2015/04/26 16:24:01 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -42,8 +42,9 @@
#define TEGRA_AHB_A2_BASE 0x7c000000
#define TEGRA_AHB_A2_SIZE 0x02000000
-#define TEGRA_HOST1X_VBASE 0xfd000000
-#define TEGRA_APB_VBASE 0xfe000000
+#define TEGRA_HOST1X_VBASE 0xfb000000
+#define TEGRA_APB_VBASE 0xfc000000
+#define TEGRA_AHB_A2_VBASE 0xfd000000
#define TEGRA_REF_FREQ 12000000
#define TEGRA_UART_FREQ TEGRA_REF_FREQ
diff -r d0b3b7e78557 -r 6114d3715234 sys/arch/evbarm/tegra/tegra_machdep.c
--- a/sys/arch/evbarm/tegra/tegra_machdep.c Sun Apr 26 16:22:57 2015 +0000
+++ b/sys/arch/evbarm/tegra/tegra_machdep.c Sun Apr 26 16:24:01 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_machdep.c,v 1.3 2015/03/29 22:27:04 jmcneill Exp $ */
+/* $NetBSD: tegra_machdep.c,v 1.4 2015/04/26 16:24:01 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.3 2015/03/29 22:27:04 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.4 2015/04/26 16:24:01 jmcneill Exp $");
#include "opt_tegra.h"
#include "opt_machdep.h"
@@ -122,6 +122,13 @@
.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
.pd_cache = PTE_NOCACHE
},
+ {
+ .pd_va = _A(TEGRA_AHB_A2_VBASE),
+ .pd_pa = _A(TEGRA_AHB_A2_BASE),
+ .pd_size = _S(TEGRA_AHB_A2_SIZE),
+ .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
+ .pd_cache = PTE_NOCACHE
+ },
{0}
};
@@ -154,11 +161,28 @@
tegra_putchar(*p);
}
}
+
+static void
+tegra_printn(u_int n, int base)
+{
+ char *p, buf[(sizeof(u_int) * NBBY / 3) + 1 + 2 /* ALT + SIGN */];
+
+ p = buf;
+ do {
+ *p++ = hexdigits[n % base];
+ } while (n /= base);
+
+ do {
+ tegra_putchar(*--p);
+ } while (p > buf);
+}
#define DPRINTF(...) printf(__VA_ARGS__)
#define DPRINT(x) tegra_putstr(x)
+#define DPRINTN(x,b) tegra_printn((x), (b))
#else
#define DPRINTF(...)
#define DPRINT(x)
+#define DPRINTN(x,b)
#endif
/*
@@ -180,6 +204,10 @@
psize_t ram_size = 0;
DPRINT("initarm:");
+ DPRINT(" sctlr<0x");
+ DPRINTN(armreg_sctlr_read(), 16);
+ DPRINT(">");
+
DPRINT(" devmap");
pmap_devmap_register(devmap);
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