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[src/trunk]: src/sys/arch/arm/nvidia initialize FIFO TX/RX trigger levels, wa...
details: https://anonhg.NetBSD.org/src/rev/5ff9d676f473
branches: trunk
changeset: 338277:5ff9d676f473
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun May 17 01:26:22 2015 +0000
description:
initialize FIFO TX/RX trigger levels, wait for MSTR_CONFIG_LOAD to clear after setting it
diffstat:
sys/arch/arm/nvidia/tegra_i2c.c | 18 ++++++++++++++++--
1 files changed, 16 insertions(+), 2 deletions(-)
diffs (48 lines):
diff -r 6d6d2d6af544 -r 5ff9d676f473 sys/arch/arm/nvidia/tegra_i2c.c
--- a/sys/arch/arm/nvidia/tegra_i2c.c Sat May 16 23:34:52 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_i2c.c Sun May 17 01:26:22 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_i2c.c,v 1.3 2015/05/16 23:09:08 jmcneill Exp $ */
+/* $NetBSD: tegra_i2c.c,v 1.4 2015/05/17 01:26:22 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_i2c.c,v 1.3 2015/05/16 23:09:08 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_i2c.c,v 1.4 2015/05/17 01:26:22 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -141,6 +141,8 @@
static void
tegra_i2c_init(struct tegra_i2c_softc *sc)
{
+ int retry = 10000;
+
I2C_WRITE(sc, I2C_CLK_DIVISOR_REG,
__SHIFTIN(0x19, I2C_CLK_DIVISOR_STD_FAST_MODE) |
__SHIFTIN(0x1, I2C_CLK_DIVISOR_HSMODE));
@@ -149,8 +151,20 @@
I2C_WRITE(sc, I2C_CNFG_REG,
I2C_CNFG_NEW_MASTER_FSM | I2C_CNFG_PACKET_MODE_EN);
I2C_SET_CLEAR(sc, I2C_SL_CNFG_REG, I2C_SL_CNFG_NEWSL, 0);
+ I2C_WRITE(sc, I2C_FIFO_CONTROL_REG,
+ __SHIFTIN(7, I2C_FIFO_CONTROL_TX_FIFO_TRIG) |
+ __SHIFTIN(0, I2C_FIFO_CONTROL_RX_FIFO_TRIG));
+
I2C_WRITE(sc, I2C_BUS_CONFIG_LOAD_REG,
I2C_BUS_CONFIG_LOAD_MSTR_CONFIG_LOAD);
+ while (--retry > 0) {
+ if (I2C_READ(sc, I2C_BUS_CONFIG_LOAD_REG) == 0)
+ break;
+ delay(10);
+ }
+ if (retry == 0) {
+ device_printf(sc->sc_dev, "config load timeout\n");
+ }
}
static int
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