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[src/trunk]: src/sys/arch/evbarm/gumstix Support Duovero and Pepper.
details: https://anonhg.NetBSD.org/src/rev/1995593d5348
branches: trunk
changeset: 348349:1995593d5348
user: kiyohara <kiyohara%NetBSD.org@localhost>
date: Sat Oct 15 15:27:18 2016 +0000
description:
Support Duovero and Pepper.
diffstat:
sys/arch/evbarm/gumstix/gumstix_machdep.c | 325 +++++-
sys/arch/evbarm/gumstix/gumstix_start.S | 230 +++-
sys/arch/evbarm/gumstix/gxio.c | 1369 +++++++++++++++++++++++++++-
3 files changed, 1764 insertions(+), 160 deletions(-)
diffs (truncated from 2413 to 300 lines):
diff -r 8efb1bb81915 -r 1995593d5348 sys/arch/evbarm/gumstix/gumstix_machdep.c
--- a/sys/arch/evbarm/gumstix/gumstix_machdep.c Sat Oct 15 15:24:00 2016 +0000
+++ b/sys/arch/evbarm/gumstix/gumstix_machdep.c Sat Oct 15 15:27:18 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gumstix_machdep.c,v 1.51 2016/03/31 14:33:17 kiyohara Exp $ */
+/* $NetBSD: gumstix_machdep.c,v 1.52 2016/10/15 15:27:18 kiyohara Exp $ */
/*
* Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation.
* All rights reserved.
@@ -137,16 +137,21 @@
* boards using RedBoot firmware.
*/
+#include "opt_com.h"
+#include "opt_cputypes.h"
#include "opt_evbarm_boardtype.h"
-#include "opt_cputypes.h"
#include "opt_gumstix.h"
-#ifdef OVERO
+#include "opt_kgdb.h"
+#include "opt_multiprocessor.h"
+#include "opt_pmap_debug.h"
+#if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
#include "opt_omap.h"
+
+#if defined(DUOVERO)
+#include "arml2cc.h"
+#endif
#include "prcm.h"
#endif
-#include "opt_kgdb.h"
-#include "opt_pmap_debug.h"
-#include "opt_com.h"
#include <sys/param.h>
#include <sys/conf.h>
@@ -159,22 +164,35 @@
#include <sys/termios.h>
#include <sys/bus.h>
#include <sys/cpu.h>
+#include <sys/gpio.h>
+
+#include <prop/proplib.h>
#include <uvm/uvm_extern.h>
-#include <machine/autoconf.h>
+#include <arm/mainbus/mainbus.h> /* don't reorder */
+
+#include <machine/autoconf.h> /* don't reorder */
#include <machine/bootconfig.h>
#include <arm/locore.h>
#include <arm/arm32/machdep.h>
-#ifdef OVERO
-#include <arm/omap/omap2_gpmcreg.h>
+#if NARML2CC > 0
+#include <arm/cortex/pl310_var.h>
+#endif
+#include <arm/cortex/scu_reg.h>
#include <arm/omap/omap2_obiovar.h>
+#include <arm/omap/am335x_prcm.h>
+#include <arm/omap/omap2_gpio.h>
+#include <arm/omap/omap2_gpmcreg.h>
#include <arm/omap/omap2_prcm.h>
-#include <arm/omap/omap2_reg.h>
+#if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
+#include <arm/omap/omap2_reg.h> /* Must required "opt_omap.h" */
+#endif
+#include <arm/omap/omap3_sdmmcreg.h>
#include <arm/omap/omap_var.h>
#include <arm/omap/omap_com.h>
-#endif
+#include <arm/omap/tifbvar.h>
#include <arm/xscale/pxa2x0reg.h>
#include <arm/xscale/pxa2x0var.h>
#include <arm/xscale/pxa2x0_gpio.h>
@@ -207,8 +225,9 @@
/* Prototypes */
#if defined(GUMSTIX)
static void read_system_serial(void);
-#elif defined(OVERO)
-static void overo_reset(void);
+#endif
+#if defined(OMAP2)
+static void omap_reset(void);
static void find_cpu_clock(void);
#endif
static void process_kernel_args(int, char *[]);
@@ -226,7 +245,7 @@
#include <dev/ic/comvar.h>
#endif
-#if defined(CPU_XSCALE_PXA250) || defined(CPU_XSCALE_PXA270)
+#if defined(CPU_XSCALE)
#include "lcd.h"
#endif
@@ -244,7 +263,11 @@
static char console[16];
#endif
-extern void gxio_config_pin(void);
+const struct tifb_panel_info *tifb_panel_info = NULL;
+/* Use TPS65217 White LED Driver */
+bool use_tps65217_wled = false;
+
+extern void gxio_config(void);
extern void gxio_config_expansion(char *);
@@ -335,20 +358,27 @@
PTE_NOCACHE,
},
#elif defined(OVERO)
- {
+ { /* SCM, PRCM */
OVERO_L4_CORE_VBASE,
_A(OMAP3530_L4_CORE_BASE),
_S(L1_S_SIZE), /* No need 16MB. Use only first 1MB */
VM_PROT_READ | VM_PROT_WRITE,
PTE_NOCACHE
},
- {
+ { /* Console, GPIO[2-6] */
OVERO_L4_PERIPHERAL_VBASE,
_A(OMAP3530_L4_PERIPHERAL_BASE),
_S(OMAP3530_L4_PERIPHERAL_SIZE),
VM_PROT_READ | VM_PROT_WRITE,
PTE_NOCACHE
},
+ { /* GPIO1 */
+ OVERO_L4_WAKEUP_VBASE,
+ _A(OMAP3530_L4_WAKEUP_BASE),
+ _S(OMAP3530_L4_WAKEUP_SIZE),
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
{
OVERO_GPMC_VBASE,
_A(GPMC_BASE),
@@ -356,6 +386,52 @@
VM_PROT_READ | VM_PROT_WRITE,
PTE_NOCACHE
},
+#elif defined(DUOVERO)
+ {
+ DUOVERO_L4_CM_VBASE,
+ _A(OMAP4430_L4_CORE_BASE + 0x100000),
+ _S(L1_S_SIZE),
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
+ { /* Console, SCU, L2CC, GPIO[2-6] */
+ DUOVERO_L4_PERIPHERAL_VBASE,
+ _A(OMAP4430_L4_PERIPHERAL_BASE),
+ _S(L1_S_SIZE * 3),
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
+ { /* PRCM, GPIO1 */
+ DUOVERO_L4_WAKEUP_VBASE,
+ _A(OMAP4430_L4_WAKEUP_BASE),
+ _S(OMAP4430_L4_WAKEUP_SIZE),
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
+ {
+ DUOVERO_GPMC_VBASE,
+ _A(GPMC_BASE),
+ _S(GPMC_SIZE),
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
+#elif defined(PEPPER)
+ {
+ /* CM, Control Module, GPIO0, Console */
+ PEPPER_PRCM_VBASE,
+ _A(OMAP2_CM_BASE),
+ _S(L1_S_SIZE),
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
+ {
+ /* GPIO[1-3] */
+ PEPPER_L4_PERIPHERAL_VBASE,
+ _A(TI_AM335X_L4_PERIPHERAL_BASE),
+ _S(L1_S_SIZE),
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
#endif
{ 0, 0, 0, 0, 0 }
};
@@ -400,16 +476,22 @@
* Overo:
* Physical Address Range Description
* ----------------------- ----------------------------------
- * 0x80000000 - 0x8fffffff SDRAM Bank 0 (256MB or 512MB)
+ * 0x80000000 - 0x9fffffff SDRAM Bank 0
+ * 0x80000000 - 0x83ffffff KERNEL_BASE
+ *
+ * DuoVero, Pepper:
+ * Physical Address Range Description
+ * ----------------------- ----------------------------------
+ * 0x80000000 - 0xbfffffff SDRAM Bank 0
* 0x80000000 - 0x83ffffff KERNEL_BASE
*/
-#if defined(GUMSTIX)
+#if defined(CPU_XSCALE)
cpu_reset_address = NULL;
-#elif defined(OVERO)
- cpu_reset_address = overo_reset;
+#elif defined(OMAP2)
+ cpu_reset_address = omap_reset;
- find_cpu_clock(); // find our CPU speed.
+ find_cpu_clock();
#endif
/*
@@ -421,7 +503,7 @@
/* map some peripheral registers at static I/O area */
pmap_devmap_bootstrap((vaddr_t)read_ttb(), gumstix_devmap);
-#if defined(CPU_XSCALE_PXA250) || defined(CPU_XSCALE_PXA270)
+#if defined(CPU_XSCALE)
/* start 32.768kHz OSC */
ioreg_write(GUMSTIX_CLKMAN_VBASE + CLKMAN_OSCC, OSCC_OON);
@@ -432,15 +514,12 @@
pxa2x0_gpio_bootstrap(GUMSTIX_GPIO_VBASE);
pxa2x0_clkman_bootstrap(GUMSTIX_CLKMAN_VBASE);
-#elif defined(CPU_CORTEX)
- cortex_pmc_ccnt_init();
#endif
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- /* configure GPIOs. */
- gxio_config_pin();
-
+ /* configure MUX, GPIO and CLK. */
+ gxio_config();
#ifndef GUMSTIX_NETBSD_ARGS_CONSOLE
consinit();
@@ -455,10 +534,11 @@
*/
#if defined(GUMSTIX)
#define SDRAM_START 0xa0000000UL
-#elif defined(OVERO)
+#elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
#define SDRAM_START 0x80000000UL
#endif
- if (((uint32_t)u_boot_args[r0] & 0xf0000000) != SDRAM_START)
+ if ((uint32_t)u_boot_args[r0] < SDRAM_START ||
+ (uint32_t)u_boot_args[r0] >= SDRAM_START + ram_size)
/* Maybe r0 is 'argc'. We are booted by command 'go'. */
process_kernel_args((int)u_boot_args[r0],
(char **)u_boot_args[r1]);
@@ -486,6 +566,28 @@
printf("initarm: Configuring system ...\n");
#endif
+#if defined(OMAP_4430)
+ const bus_space_tag_t iot = &omap_bs_tag;
+ bus_space_handle_t ioh;
+
+#if NARML2CC > 0
+ /*
+ * Initialize L2-Cache parameters
+ */
+
+ if (bus_space_map(iot, OMAP4_L2CC_BASE, OMAP4_L2CC_SIZE, 0, &ioh) != 0)
+ panic("OMAP4_L2CC_BASE map failed\n");
+ arml2cc_init(iot, ioh, 0);
+#endif
+
+#ifdef MULTIPROCESSOR
+ if (bus_space_map(iot, OMAP4_SCU_BASE, SCU_SIZE, 0, &ioh) != 0)
+ panic("OMAP4_SCU_BASE map failed\n");
+ arm_cpu_max =
+ 1 + (bus_space_read_4(iot, ioh, SCU_CFG) & SCU_CFG_CPUMAX);
+#endif
+#endif
+
/* Fake bootconfig structure for the benefit of pmap.c */
/* XXX must make the memory description h/w independent */
bootconfig.dramblocks = 1;
@@ -497,9 +599,9 @@
arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
(uintptr_t) KERNEL_BASE_phys);
arm32_kernel_vm_init(KERNEL_VM_BASE,
-#if defined(CPU_XSCALE_PXA250) || defined(CPU_XSCALE_PXA270)
+#if defined(CPU_XSCALE)
ARM_VECTORS_LOW,
-#elif defined(CPU_CORTEXA8)
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