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[src/trunk]: src/sys/arch/arm/cortex Correct a comment
details: https://anonhg.NetBSD.org/src/rev/d231f990d542
branches: trunk
changeset: 338800:d231f990d542
user: skrll <skrll%NetBSD.org@localhost>
date: Tue Jun 09 10:22:15 2015 +0000
description:
Correct a comment
diffstat:
sys/arch/arm/cortex/gic_reg.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diffs (18 lines):
diff -r f02b0affd63d -r d231f990d542 sys/arch/arm/cortex/gic_reg.h
--- a/sys/arch/arm/cortex/gic_reg.h Tue Jun 09 09:18:37 2015 +0000
+++ b/sys/arch/arm/cortex/gic_reg.h Tue Jun 09 10:22:15 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gic_reg.h,v 1.4 2015/06/05 06:46:00 skrll Exp $ */
+/* $NetBSD: gic_reg.h,v 1.5 2015/06/09 10:22:15 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -48,7 +48,7 @@
#define GICC_CTRL 0x0000 // CPU Interface Control Register
#define GICC_PMR 0x0004 // Interrupt Priority Mask Register
-#define GICC_BPR 0x0008 // Aliased Binary Point Register
+#define GICC_BPR 0x0008 // Binary Point Register
#define GICC_IAR 0x000C // Interrupt Acknowledge Register
#define GICC_EOIR 0x0010 // End Of Interrupt Register (WO)
#define GICC_RPR 0x0014 // Running Priority Register
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