[src/trunk]: src/sys/dev/marvell reduce magic numbers. SDRAM address space at...

[hsuenaga <hsuenaga%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/21cfe7cc9fe9
branches:  trunk
changeset: 338656:21cfe7cc9fe9
user:      hsuenaga <hsuenaga%NetBSD.org@localhost>
date:      Wed Jun 03 04:00:06 2015 +0000

description:
reduce magic numbers. SDRAM address space attribute register has cache coherency
control bits. this bit is important for AURORA_IO_CACHE_COHERENCY.

diffstat:

 sys/dev/marvell/marvellreg.h |  12 +++++++-----
 1 files changed, 7 insertions(+), 5 deletions(-)

diffs (27 lines):

diff -r c72f17ba6b3d -r 21cfe7cc9fe9 sys/dev/marvell/marvellreg.h
--- a/sys/dev/marvell/marvellreg.h      Wed Jun 03 03:55:47 2015 +0000
+++ b/sys/dev/marvell/marvellreg.h      Wed Jun 03 04:00:06 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: marvellreg.h,v 1.8 2014/03/15 10:40:39 kiyohara Exp $  */
+/*     $NetBSD: marvellreg.h,v 1.9 2015/06/03 04:00:06 hsuenaga Exp $  */
 /*
  * Copyright (c) 2009 KIYOHARA Takashi
  * All rights reserved.
@@ -73,11 +73,13 @@
 #define MARVELL_DISCOVERY_REVB 0x20
 
 #define MARVELL_ATTR_MASK              0xff
+#define MARVELL_ATTR_SDRAM_CFU_SHARE   0x10 /* shared and snoop enabled.*/
+#define MARVELL_ATTR_SDRAM_CFU_L2_DEP  0x20 /* enable L2 deposit */
 #ifdef AURORA_IO_CACHE_COHERENCY
-#define MARVELL_ATTR_SDRAM_CS0         0x1e
-#define MARVELL_ATTR_SDRAM_CS1         0x1d
-#define MARVELL_ATTR_SDRAM_CS2         0x1b
-#define MARVELL_ATTR_SDRAM_CS3         0x17
+#define MARVELL_ATTR_SDRAM_CS0         (0x0e | MARVELL_ATTR_SDRAM_CFU_SHARE)
+#define MARVELL_ATTR_SDRAM_CS1         (0x0d | MARVELL_ATTR_SDRAM_CFU_SHARE)
+#define MARVELL_ATTR_SDRAM_CS2         (0x0b | MARVELL_ATTR_SDRAM_CFU_SHARE)
+#define MARVELL_ATTR_SDRAM_CS3         (0x07 | MARVELL_ATTR_SDRAM_CFU_SHARE)
 #else
 #define MARVELL_ATTR_SDRAM_CS0         0x0e
 #define MARVELL_ATTR_SDRAM_CS1         0x0d