Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/dev/pci Decode Resizable BAR.
details: https://anonhg.NetBSD.org/src/rev/c135b8bc8685
branches: trunk
changeset: 348630:c135b8bc8685
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Mon Oct 31 05:10:45 2016 +0000
description:
Decode Resizable BAR.
diffstat:
sys/dev/pci/pci_subr.c | 63 ++++++++++++++++++++++++++++++++++++++++++++-----
sys/dev/pci/pcireg.h | 14 ++++++++--
2 files changed, 67 insertions(+), 10 deletions(-)
diffs (147 lines):
diff -r 2a3909f2b6d0 -r c135b8bc8685 sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c Mon Oct 31 05:08:53 2016 +0000
+++ b/sys/dev/pci/pci_subr.c Mon Oct 31 05:10:45 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.152 2016/10/20 04:11:02 msaitoh Exp $ */
+/* $NetBSD: pci_subr.c,v 1.153 2016/10/31 05:10:45 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.152 2016/10/20 04:11:02 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.153 2016/10/31 05:10:45 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -3023,7 +3023,56 @@
}
/* XXX pci_conf_print_amd_cap */
-/* XXX pci_conf_print_resiz_bar_cap */
+
+#define MEM_PBUFSIZE sizeof("999GB")
+
+static void
+pci_conf_print_resizbar_cap(const pcireg_t *regs, int capoff, int extcapoff)
+{
+ pcireg_t cap, ctl;
+ unsigned int bars, i, n;
+ char pbuf[MEM_PBUFSIZE];
+
+ printf("\n Resizable BAR\n");
+
+ /* Get Number of Resizable BARs */
+ ctl = regs[o2i(extcapoff + PCI_RESIZBAR_CTL(0))];
+ bars = __SHIFTOUT(ctl, PCI_RESIZBAR_CTL_NUMBAR);
+ printf(" Number of Resizable BARs: ");
+ if (bars <= 6)
+ printf("%u\n", bars);
+ else {
+ printf("incorrect (%u)\n", bars);
+ return;
+ }
+
+ for (n = 0; n < 6; n++) {
+ cap = regs[o2i(extcapoff + PCI_RESIZBAR_CAP(n))];
+ printf(" Capability register(%u): 0x%08x\n", n, cap);
+ if ((cap & PCI_RESIZBAR_CAP_SIZEMASK) == 0)
+ continue; /* Not Used */
+ printf(" Acceptable BAR sizes:");
+ for (i = 4; i <= 23; i++) {
+ if ((cap & (1 << i)) != 0) {
+ humanize_number(pbuf, MEM_PBUFSIZE,
+ (int64_t)1024 * 1024 << (i - 4), "B",
+ HN_AUTOSCALE, HN_NOSPACE);
+ printf(" %s", pbuf);
+ }
+ }
+ printf("\n");
+
+ ctl = regs[o2i(extcapoff + PCI_RESIZBAR_CTL(n))];
+ printf(" Control register(%u): 0x%08x\n", n, ctl);
+ printf(" BAR Index: %u\n",
+ (unsigned int)__SHIFTOUT(ctl, PCI_RESIZBAR_CTL_BARIDX));
+ humanize_number(pbuf, MEM_PBUFSIZE,
+ (int64_t)1024 * 1024
+ << __SHIFTOUT(ctl, PCI_RESIZBAR_CTL_BARSIZ),
+ "B", HN_AUTOSCALE, HN_NOSPACE);
+ printf(" BAR Size: %s\n", pbuf);
+ }
+}
static void
pci_conf_print_dpa_cap(const pcireg_t *regs, int capoff, int extcapoff)
@@ -3377,7 +3426,7 @@
/* XXX pci_conf_print_frsq_cap */
/* XXX pci_conf_print_rtr_cap */
/* XXX pci_conf_print_desigvndsp_cap */
-/* XXX pci_conf_print_vf_resiz_bar_cap */
+/* XXX pci_conf_print_vf_resizbar_cap */
#undef MS
#undef SM
@@ -3430,8 +3479,8 @@
pci_conf_print_page_req_cap },
{ PCI_EXTCAP_AMD, "Reserved for AMD",
NULL },
- { PCI_EXTCAP_RESIZ_BAR, "Resizable BAR",
- NULL },
+ { PCI_EXTCAP_RESIZBAR, "Resizable BAR",
+ pci_conf_print_resizbar_cap },
{ PCI_EXTCAP_DPA, "Dynamic Power Allocation",
pci_conf_print_dpa_cap },
{ PCI_EXTCAP_TPH_REQ, "TPH Requester",
@@ -3460,7 +3509,7 @@
NULL },
{ PCI_EXTCAP_DESIGVNDSP, "Designated Vendor-Specific",
NULL },
- { PCI_EXTCAP_VF_RESIZ_BAR, "VF Resizable BARs",
+ { PCI_EXTCAP_VF_RESIZBAR, "VF Resizable BARs",
NULL },
};
diff -r 2a3909f2b6d0 -r c135b8bc8685 sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h Mon Oct 31 05:08:53 2016 +0000
+++ b/sys/dev/pci/pcireg.h Mon Oct 31 05:10:45 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.116 2016/10/20 04:11:02 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.117 2016/10/31 05:10:45 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -1396,7 +1396,7 @@
#define PCI_EXTCAP_MCAST 0x0012 /* Multicast */
#define PCI_EXTCAP_PAGE_REQ 0x0013 /* Page Request */
#define PCI_EXTCAP_AMD 0x0014 /* Reserved for AMD */
-#define PCI_EXTCAP_RESIZ_BAR 0x0015 /* Resizable BAR */
+#define PCI_EXTCAP_RESIZBAR 0x0015 /* Resizable BAR */
#define PCI_EXTCAP_DPA 0x0016 /* Dynamic Power Allocation */
#define PCI_EXTCAP_TPH_REQ 0x0017 /* TPH Requester */
#define PCI_EXTCAP_LTR 0x0018 /* Latency Tolerance Reporting */
@@ -1411,7 +1411,7 @@
#define PCI_EXTCAP_FRSQ 0x0021 /* Function Reading Status Queueing */
#define PCI_EXTCAP_RTR 0x0022 /* Readiness Time Reporting */
#define PCI_EXTCAP_DESIGVNDSP 0x0023 /* Designated Vendor-Specific */
-#define PCI_EXTCAP_VF_RESIZ_BAR 0x0024 /* VF Resizable BAR */
+#define PCI_EXTCAP_VF_RESIZBAR 0x0024 /* VF Resizable BAR */
/*
* Extended capability ID: 0x0001
@@ -1786,6 +1786,14 @@
* Extended capability ID: 0x0015
* Resizable BAR
*/
+#define PCI_RESIZBAR_CAP0 0x04 /* Capability Register(0) */
+#define PCI_RESIZBAR_CAP(x) (PCI_RESIZBAR_CAP0 + ((x) * 8))
+#define PCI_RESIZBAR_CAP_SIZEMASK __BITS(23, 4) /* BAR size bitmask */
+#define PCI_RESIZBAR_CTL0 0x08 /* Control Register(0) */
+#define PCI_RESIZBAR_CTL(x) (PCI_RESIZBAR_CTL0 + ((x) * 8))
+#define PCI_RESIZBAR_CTL_BARIDX __BITS(2, 0)
+#define PCI_RESIZBAR_CTL_NUMBAR __BITS(7, 5)
+#define PCI_RESIZBAR_CTL_BARSIZ __BITS(12, 8)
/*
* Extended capability ID: 0x0016
Home |
Main Index |
Thread Index |
Old Index