[src/trunk]: src/sys/arch/powerpc/oea Don't reload if just re-enabling

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/48ae3cfc101a
branches:  trunk
changeset: 339221:48ae3cfc101a
user:      matt <matt%NetBSD.org@localhost>
date:      Mon Jul 06 02:43:26 2015 +0000

description:
Don't reload if just re-enabling

diffstat:

 sys/arch/powerpc/oea/altivec.c |  40 +++++++++++++++++++++-------------------
 1 files changed, 21 insertions(+), 19 deletions(-)

diffs (69 lines):

diff -r c6177e69330d -r 48ae3cfc101a sys/arch/powerpc/oea/altivec.c
--- a/sys/arch/powerpc/oea/altivec.c    Mon Jul 06 02:30:22 2015 +0000
+++ b/sys/arch/powerpc/oea/altivec.c    Mon Jul 06 02:43:26 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: altivec.c,v 1.29 2014/05/16 00:48:41 rmind Exp $       */
+/*     $NetBSD: altivec.c,v 1.30 2015/07/06 02:43:26 matt Exp $        */
 
 /*
  * Copyright (C) 1996 Wolfgang Solfrank.
@@ -32,7 +32,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: altivec.c,v 1.29 2014/05/16 00:48:41 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: altivec.c,v 1.30 2015/07/06 02:43:26 matt Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -82,18 +82,26 @@
                vec_mark_used(l);
        }
 
-       /*
-        * Enable AltiVec temporarily (and disable interrupts).
-        */
-       const register_t msr = mfmsr();
-       mtmsr((msr & ~PSL_EE) | PSL_VEC);
-       __asm volatile ("isync");
+       if ((flags & PCU_REENABLE) == 0) {
+               /*
+                * Enable AltiVec temporarily (and disable interrupts).
+                */
+               const register_t msr = mfmsr();
+               mtmsr((msr & ~PSL_EE) | PSL_VEC);
+               __asm volatile ("isync");
 
-       /*
-        * Load the vector unit from vreg which is best done in
-        * assembly.
-        */
-       vec_load_from_vreg(&pcb->pcb_vr);
+               /*
+                * Load the vector unit from vreg which is best done in
+                * assembly.
+                */
+               vec_load_from_vreg(&pcb->pcb_vr);
+
+               /*
+                * Restore MSR (turn off AltiVec)
+                */
+               mtmsr(msr);
+               __asm volatile ("isync");
+       }
 
        /*
         * VRSAVE will be restored when trap frame returns
@@ -101,12 +109,6 @@
        l->l_md.md_utf->tf_vrsave = pcb->pcb_vr.vrsave;
 
        /*
-        * Restore MSR (turn off AltiVec)
-        */
-       mtmsr(msr);
-       __asm volatile ("isync");
-
-       /*
         * Mark vector registers as modified.
         */
        l->l_md.md_flags |= PSL_VEC;