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[src/trunk]: src/sys/arch Have the cpu clear PSL_D automatically when enterin...
details: https://anonhg.NetBSD.org/src/rev/7da795c696a9
branches: trunk
changeset: 356854:7da795c696a9
user: maxv <maxv%NetBSD.org@localhost>
date: Tue Oct 17 07:33:44 2017 +0000
description:
Have the cpu clear PSL_D automatically when entering the kernel via a
syscall. Then, don't clear PSL_D and PSL_AC in the syscall entry point,
they are now both cleared by the cpu (faster). However they still need to
be manually cleared in the interrupt/trap entry points.
diffstat:
sys/arch/amd64/amd64/amd64_trap.S | 6 ++++--
sys/arch/amd64/amd64/locore.S | 3 ++-
sys/arch/amd64/include/frameasm.h | 8 ++++----
sys/arch/x86/x86/cpu.c | 6 +++---
4 files changed, 13 insertions(+), 10 deletions(-)
diffs (100 lines):
diff -r 56062096bac7 -r 7da795c696a9 sys/arch/amd64/amd64/amd64_trap.S
--- a/sys/arch/amd64/amd64/amd64_trap.S Tue Oct 17 07:23:08 2017 +0000
+++ b/sys/arch/amd64/amd64/amd64_trap.S Tue Oct 17 07:33:44 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amd64_trap.S,v 1.11 2017/09/15 17:32:12 maxv Exp $ */
+/* $NetBSD: amd64_trap.S,v 1.12 2017/10/17 07:33:44 maxv Exp $ */
/*
* Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
#if 0
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.11 2017/09/15 17:32:12 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.12 2017/10/17 07:33:44 maxv Exp $");
#endif
/*
@@ -122,6 +122,8 @@
pushq $T_NMI
subq $TF_REGSIZE,%rsp
INTR_SAVE_GPRS
+ cld
+ callq smap_enable
movw %gs,TF_GS(%rsp)
movw %fs,TF_FS(%rsp)
movw %es,TF_ES(%rsp)
diff -r 56062096bac7 -r 7da795c696a9 sys/arch/amd64/amd64/locore.S
--- a/sys/arch/amd64/amd64/locore.S Tue Oct 17 07:23:08 2017 +0000
+++ b/sys/arch/amd64/amd64/locore.S Tue Oct 17 07:33:44 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.131 2017/09/30 11:43:57 maxv Exp $ */
+/* $NetBSD: locore.S,v 1.132 2017/10/17 07:33:44 maxv Exp $ */
/*
* Copyright-o-rama!
@@ -1278,6 +1278,7 @@
pushq $2 /* error code */
pushq $T_ASTFLT
subq $TF_REGSIZE,%rsp
+ cld
#endif
INTR_SAVE_GPRS
movw %es,TF_ES(%rsp)
diff -r 56062096bac7 -r 7da795c696a9 sys/arch/amd64/include/frameasm.h
--- a/sys/arch/amd64/include/frameasm.h Tue Oct 17 07:23:08 2017 +0000
+++ b/sys/arch/amd64/include/frameasm.h Tue Oct 17 07:33:44 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: frameasm.h,v 1.22 2017/10/17 06:58:15 maxv Exp $ */
+/* $NetBSD: frameasm.h,v 1.23 2017/10/17 07:33:44 maxv Exp $ */
#ifndef _AMD64_MACHINE_FRAMEASM_H
#define _AMD64_MACHINE_FRAMEASM_H
@@ -55,9 +55,7 @@
movq %r15,TF_R15(%rsp) ; \
movq %rbp,TF_RBP(%rsp) ; \
movq %rbx,TF_RBX(%rsp) ; \
- movq %rax,TF_RAX(%rsp) ; \
- cld ; \
- callq smap_enable
+ movq %rax,TF_RAX(%rsp)
#define INTR_RESTORE_GPRS \
movq TF_RDI(%rsp),%rdi ; \
@@ -79,6 +77,8 @@
#define INTRENTRY_L(kernel_trap, usertrap) \
subq $TF_REGSIZE,%rsp ; \
INTR_SAVE_GPRS ; \
+ cld ; \
+ callq smap_enable ; \
testb $SEL_UPL,TF_CS(%rsp) ; \
je kernel_trap ; \
usertrap ; \
diff -r 56062096bac7 -r 7da795c696a9 sys/arch/x86/x86/cpu.c
--- a/sys/arch/x86/x86/cpu.c Tue Oct 17 07:23:08 2017 +0000
+++ b/sys/arch/x86/x86/cpu.c Tue Oct 17 07:33:44 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.137 2017/10/17 06:58:15 maxv Exp $ */
+/* $NetBSD: cpu.c,v 1.138 2017/10/17 07:33:44 maxv Exp $ */
/*
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.137 2017/10/17 06:58:15 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.138 2017/10/17 07:33:44 maxv Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@@ -1048,7 +1048,7 @@
((uint64_t)LSEL(LSYSRETBASE_SEL, SEL_UPL) << 48));
wrmsr(MSR_LSTAR, (uint64_t)Xsyscall);
wrmsr(MSR_CSTAR, (uint64_t)Xsyscall32);
- wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_AC);
+ wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D|PSL_AC);
if (full) {
wrmsr(MSR_FSBASE, 0);
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