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[src/trunk]: src/sys/arch/powerpc/include/oea add a few pp970-specific bits



details:   https://anonhg.NetBSD.org/src/rev/94d28297744e
branches:  trunk
changeset: 359593:94d28297744e
user:      macallan <macallan%NetBSD.org@localhost>
date:      Fri Feb 16 18:04:06 2018 +0000

description:
add a few pp970-specific bits

diffstat:

 sys/arch/powerpc/include/oea/hid.h |  16 +++++++++++++++-
 sys/arch/powerpc/include/oea/spr.h |  11 ++++++++++-
 2 files changed, 25 insertions(+), 2 deletions(-)

diffs (53 lines):

diff -r b99d22db9063 -r 94d28297744e sys/arch/powerpc/include/oea/hid.h
--- a/sys/arch/powerpc/include/oea/hid.h        Fri Feb 16 18:02:10 2018 +0000
+++ b/sys/arch/powerpc/include/oea/hid.h        Fri Feb 16 18:04:06 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: hid.h,v 1.11 2017/07/07 22:13:35 macallan Exp $        */
+/*     $NetBSD: hid.h,v 1.12 2018/02/16 18:04:06 macallan Exp $        */
 
 /*-
  * Copyright (c) 2000 Tsubai Masanari.  All rights reserved.
@@ -172,4 +172,18 @@
 #define        HID1_SYNCBE     0x00000800      /* Enable sync/eieio broadcast */
 #define        HID1_ABE        0x00000400      /* Enable address broadcast */
 
+/* PPC970 HID4 */
+#define HID4_RMLR0     0x0000000000000020      /* real mode limit bit 0 */
+#define HID4_RMLR1     0x4000000000000000      /* real mode limit bit 1 */
+#define HID4_RMLR2     0x2000000000000000      /* real mode limit bit 2 */
+/*
+ * real mode limit bits 012
+ * 011 - 64MB
+ * 111 - 128MB
+ * 100 - 256MB
+ * x10 - 1GB
+ * x01 - 16GB
+ * 000 - 256GB
+ */
+
 #endif /* _POWERPC_OEA_HID_H_ */
diff -r b99d22db9063 -r 94d28297744e sys/arch/powerpc/include/oea/spr.h
--- a/sys/arch/powerpc/include/oea/spr.h        Fri Feb 16 18:02:10 2018 +0000
+++ b/sys/arch/powerpc/include/oea/spr.h        Fri Feb 16 18:04:06 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: spr.h,v 1.3 2015/07/07 15:41:46 macallan Exp $ */
+/*     $NetBSD: spr.h,v 1.4 2018/02/16 18:04:06 macallan Exp $ */
 
 #ifndef _POWERPC_OEA_SPR_H_
 #define        _POWERPC_OEA_SPR_H_
@@ -28,6 +28,15 @@
 #define        SPR_RTCL_W              0x015   /* ..6. 601 RTC Lower - Write */
 #define        SPR_SDR1                0x019   /* ..68 Page table base address register */
 #define        SPR_VRSAVE              0x100   /* ..6. AltiVec VRSAVE */
+#define SPR_SCOMC              0x114   /* .... SCOM Control Register (970) */
+#define SPR_SCOMD              0x115   /* .... SCOM Data Register (970) */
+#define  SCOM_PCR                0x0aa00100    /* Power Control Register */
+#define  SCOM_PCR_BIT            0x80000000    /* Data bit */
+#define  SCOM_PSR                0x40800100    /* Power Status Register */
+#define  PSR_RECEIVED            (1ULL << 61)
+#define  PSR_COMPLETED           (1ULL << 60)
+#define  SCOMC_READ              0x00008000
+#define  SCOMC_WRITE             0x00000000
 #define        SPR_ASR                 0x118   /* ..6. Address Space Register (PPC64) */
 #define        SPR_EAR                 0x11a   /* ..68 External Access Register */
 #define          MPC601                  0x0001



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