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[src/trunk]: src/sys/arch/sparc/dev add load & store instructions for channel...
details: https://anonhg.NetBSD.org/src/rev/09291b653aad
branches: trunk
changeset: 357197:09291b653aad
user: macallan <macallan%NetBSD.org@localhost>
date: Mon Oct 30 21:41:39 2017 +0000
description:
add load & store instructions for channel data type
mostly for Xorg
diffstat:
sys/arch/sparc/dev/sxreg.h | 20 +++++++++++++++++++-
1 files changed, 19 insertions(+), 1 deletions(-)
diffs (41 lines):
diff -r 27ccf9ff4657 -r 09291b653aad sys/arch/sparc/dev/sxreg.h
--- a/sys/arch/sparc/dev/sxreg.h Mon Oct 30 17:13:39 2017 +0000
+++ b/sys/arch/sparc/dev/sxreg.h Mon Oct 30 21:41:39 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sxreg.h,v 1.13 2017/01/13 21:49:46 macallan Exp $ */
+/* $NetBSD: sxreg.h,v 1.14 2017/10/30 21:41:39 macallan Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -158,6 +158,14 @@
SX_UQUAD_16 | (dreg << 7) | (o))
#define SX_LDUQ24(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \
SX_UQUAD_24 | (dreg << 7) | (o))
+#define SX_LDUC0(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \
+ SX_UCHAN_0 | (dreg << 7) | (o))
+#define SX_LDUC8(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \
+ SX_UCHAN_8 | (dreg << 7) | (o))
+#define SX_LDUC16(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \
+ SX_UCHAN_16 | (dreg << 7) | (o))
+#define SX_LDUC24(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \
+ SX_UCHAN_24 | (dreg << 7) | (o))
#define SX_ST(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
SX_LONG | (sreg << 7) | (o))
#define SX_STM(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_MASK | \
@@ -184,6 +192,16 @@
SX_UQUAD_16 | (sreg << 7) | (o))
#define SX_STUQ24(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
SX_UQUAD_24 | (sreg << 7) | (o))
+#define SX_STUC0(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
+ SX_UCHAN_0 | (sreg << 7) | (o))
+#define SX_STUC0C(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_CLAMP | \
+ SX_UCHAN_0 | (sreg << 7) | (o))
+#define SX_STUC8(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
+ SX_UCHAN_8 | (sreg << 7) | (o))
+#define SX_STUC16(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
+ SX_UCHAN_16 | (sreg << 7) | (o))
+#define SX_STUC24(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
+ SX_UCHAN_24 | (sreg << 7) | (o))
/* ROP and SELECT instructions */
#define SX_ROPB (0x0 << 21) /* mask bits apply to bytes */
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