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[src/trunk]: src/sys/arch/x86/x86 Mask mxcsr, otherwise userland could set re...
details: https://anonhg.NetBSD.org/src/rev/22ee1dac94ac
branches: trunk
changeset: 357217:22ee1dac94ac
user: maxv <maxv%NetBSD.org@localhost>
date: Tue Oct 31 18:13:37 2017 +0000
description:
Mask mxcsr, otherwise userland could set reserved bits to 1 and make
xrstor fault.
diffstat:
sys/arch/x86/x86/fpu.c | 10 +++++++---
1 files changed, 7 insertions(+), 3 deletions(-)
diffs (32 lines):
diff -r 2ac54ff1e1a3 -r 22ee1dac94ac sys/arch/x86/x86/fpu.c
--- a/sys/arch/x86/x86/fpu.c Tue Oct 31 16:10:25 2017 +0000
+++ b/sys/arch/x86/x86/fpu.c Tue Oct 31 18:13:37 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.18 2017/10/31 15:16:10 maxv Exp $ */
+/* $NetBSD: fpu.c,v 1.19 2017/10/31 18:13:37 maxv Exp $ */
/*
* Copyright (c) 2008 The NetBSD Foundation, Inc. All
@@ -96,7 +96,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.18 2017/10/31 15:16:10 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.19 2017/10/31 18:13:37 maxv Exp $");
#include "opt_multiprocessor.h"
@@ -572,8 +572,12 @@
if (i386_use_fxsave) {
memcpy(&fpu_save->sv_xmm, fpregs, sizeof(fpu_save->sv_xmm));
- /* Invalid bits in the mxcsr_mask will cause faults */
+
+ /*
+ * Invalid bits in mxcsr or mxcsr_mask will cause faults.
+ */
fpu_save->sv_xmm.fx_mxcsr_mask &= __INITIAL_MXCSR_MASK__;
+ fpu_save->sv_xmm.fx_mxcsr &= fpu_save->sv_xmm.fx_mxcsr_mask;
/*
* Make sure the x87 and SSE bits are set in xstate_bv.
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