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[src/trunk]: src/sys/arch/arm/sunxi Fix USB clocks
details: https://anonhg.NetBSD.org/src/rev/52f49bce8ed2
branches: trunk
changeset: 357138:52f49bce8ed2
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat Oct 28 12:56:10 2017 +0000
description:
Fix USB clocks
diffstat:
sys/arch/arm/sunxi/sun8i_a83t_ccu.c | 18 +++++++++---------
1 files changed, 9 insertions(+), 9 deletions(-)
diffs (49 lines):
diff -r 5e74aee99b2e -r 52f49bce8ed2 sys/arch/arm/sunxi/sun8i_a83t_ccu.c
--- a/sys/arch/arm/sunxi/sun8i_a83t_ccu.c Sat Oct 28 12:07:40 2017 +0000
+++ b/sys/arch/arm/sunxi/sun8i_a83t_ccu.c Sat Oct 28 12:56:10 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_a83t_ccu.c,v 1.2 2017/10/28 12:07:40 jmcneill Exp $ */
+/* $NetBSD: sun8i_a83t_ccu.c,v 1.3 2017/10/28 12:56:10 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun8i_a83t_ccu.c,v 1.2 2017/10/28 12:07:40 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_a83t_ccu.c,v 1.3 2017/10/28 12:56:10 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -86,9 +86,9 @@
SUNXI_CCU_RESET(A83T_RST_BUS_SPI0, BUS_SOFT_RST_REG0, 20),
SUNXI_CCU_RESET(A83T_RST_BUS_SPI1, BUS_SOFT_RST_REG0, 21),
SUNXI_CCU_RESET(A83T_RST_BUS_OTG, BUS_SOFT_RST_REG0, 23),
- SUNXI_CCU_RESET(A83T_RST_BUS_EHCI0, BUS_SOFT_RST_REG0, 24),
- SUNXI_CCU_RESET(A83T_RST_BUS_EHCI1, BUS_SOFT_RST_REG0, 25),
- SUNXI_CCU_RESET(A83T_RST_BUS_OHCI0, BUS_SOFT_RST_REG0, 28),
+ SUNXI_CCU_RESET(A83T_RST_BUS_EHCI0, BUS_SOFT_RST_REG0, 26),
+ SUNXI_CCU_RESET(A83T_RST_BUS_EHCI1, BUS_SOFT_RST_REG0, 27),
+ SUNXI_CCU_RESET(A83T_RST_BUS_OHCI0, BUS_SOFT_RST_REG0, 29),
SUNXI_CCU_RESET(A83T_RST_BUS_VE, BUS_SOFT_RST_REG1, 0),
SUNXI_CCU_RESET(A83T_RST_BUS_TCON0, BUS_SOFT_RST_REG1, 3),
@@ -180,13 +180,13 @@
SUNXI_CCU_GATE(A83T_CLK_BUS_EMAC, "bus-emac", "ahb2",
BUS_CLK_GATING_REG0, 17),
SUNXI_CCU_GATE(A83T_CLK_BUS_OTG, "bus-otg", "ahb1",
- BUS_CLK_GATING_REG0, 23),
+ BUS_CLK_GATING_REG0, 24),
SUNXI_CCU_GATE(A83T_CLK_BUS_EHCI0, "bus-ehci0", "ahb1",
- BUS_CLK_GATING_REG0, 24),
+ BUS_CLK_GATING_REG0, 26),
SUNXI_CCU_GATE(A83T_CLK_BUS_EHCI1, "bus-ehci1", "ahb2",
- BUS_CLK_GATING_REG0, 25),
+ BUS_CLK_GATING_REG0, 27),
SUNXI_CCU_GATE(A83T_CLK_BUS_OHCI0, "bus-ohci0", "ahb1",
- BUS_CLK_GATING_REG0, 28),
+ BUS_CLK_GATING_REG0, 29),
SUNXI_CCU_GATE(A83T_CLK_BUS_PIO, "bus-pio", "apb1",
BUS_CLK_GATING_REG2, 5),
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