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[src/trunk]: src/sys/arch/arm/arm Add a white-space into comment and `*/'.
details: https://anonhg.NetBSD.org/src/rev/0390e434781e
branches: trunk
changeset: 350191:0390e434781e
user: kiyohara <kiyohara%NetBSD.org@localhost>
date: Sat Jan 07 15:22:11 2017 +0000
description:
Add a white-space into comment and `*/'.
diffstat:
sys/arch/arm/arm/cpufunc_asm_pj4b.S | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diffs (18 lines):
diff -r 0fd3683135fb -r 0390e434781e sys/arch/arm/arm/cpufunc_asm_pj4b.S
--- a/sys/arch/arm/arm/cpufunc_asm_pj4b.S Sat Jan 07 15:14:20 2017 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_pj4b.S Sat Jan 07 15:22:11 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm_pj4b.S,v 1.11 2015/05/20 02:59:57 hsuenaga Exp $ */
+/* $NetBSD: cpufunc_asm_pj4b.S,v 1.12 2017/01/07 15:22:11 kiyohara Exp $ */
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
@@ -43,7 +43,7 @@
#define MV_FMC0_SMP (1 << 1) /* SMP/nAMP enable */
#define MV_FMC0_PARITY (1 << 2) /* Enable L1 Cache Parity */
-#define MV_FMC0_LFDIS (1 << 7) /* Disable DC Speculative linefill*/
+#define MV_FMC0_LFDIS (1 << 7) /* Disable DC Speculative linefill */
#define MV_FMC0_FW (1 << 8) /* Cache & TLB maintenance broadcast */
#define MPIDR_CPUID_MASK (0x3 << 0) /* CPUID */
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