[src/trunk]: src/sys/arch/arm/arm Fixup CPU_PJ4B for recent armv7 tlb operati...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/79ee522d1ff5
branches:  trunk
changeset: 355980:79ee522d1ff5
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat Aug 26 07:17:12 2017 +0000

description:
Fixup CPU_PJ4B for recent armv7 tlb operation changes.

diffstat:

 sys/arch/arm/arm/cpufunc.c |  48 ++++++++++++++++++++++++++-------------------
 1 files changed, 28 insertions(+), 20 deletions(-)

diffs (90 lines):

diff -r 58c1adda241a -r 79ee522d1ff5 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Fri Aug 25 22:59:47 2017 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Sat Aug 26 07:17:12 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.164 2017/08/24 14:19:36 jmcneill Exp $   */
+/*     $NetBSD: cpufunc.c,v 1.165 2017/08/26 07:17:12 skrll Exp $      */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.164 2017/08/24 14:19:36 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.165 2017/08/26 07:17:12 skrll Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -1364,12 +1364,12 @@
 
        /* TLB functions */
 
-       .cf_tlb_flushID         = armv7_tlb_flushID,
-       .cf_tlb_flushID_SE      = armv7_tlb_flushID_SE,
-       .cf_tlb_flushI          = armv7_tlb_flushID,
-       .cf_tlb_flushI_SE       = armv7_tlb_flushID_SE,
-       .cf_tlb_flushD          = armv7_tlb_flushID,
-       .cf_tlb_flushD_SE       = armv7_tlb_flushID_SE,
+       .cf_tlb_flushID         = armv7up_tlb_flushID,
+       .cf_tlb_flushID_SE      = armv7up_tlb_flushID_SE,
+       .cf_tlb_flushI          = armv7up_tlb_flushID,
+       .cf_tlb_flushI_SE       = armv7up_tlb_flushID_SE,
+       .cf_tlb_flushD          = armv7up_tlb_flushID,
+       .cf_tlb_flushD_SE       = armv7up_tlb_flushID_SE,
 
        /* Cache operations (see also pj4bv7_setup) */
        .cf_icache_sync_all     = armv7_idcache_wbinv_all,
@@ -1763,6 +1763,24 @@
 
 #endif /* ARM2 || ARM250 || ARM3 || ARM6 || ARM7 || SA110 || SA1100 || SA1111 || IXP12X0 */
 
+
+static inline void
+set_cpufuncs_mpfixup(void)
+{
+#ifdef MULTIPROCESSOR
+       /* If MP extensions are present, patch in MP TLB ops */
+       const uint32_t mpidr = armreg_mpidr_read();
+       if ((mpidr & (MPIDR_MP|MPIDR_U)) == MPIDR_MP) {
+               cpufuncs.cf_tlb_flushID = armv7mp_tlb_flushID;
+               cpufuncs.cf_tlb_flushID_SE = armv7mp_tlb_flushID_SE;
+               cpufuncs.cf_tlb_flushI = armv7mp_tlb_flushI;
+               cpufuncs.cf_tlb_flushI_SE = armv7mp_tlb_flushI_SE;
+               cpufuncs.cf_tlb_flushD = armv7mp_tlb_flushD;
+               cpufuncs.cf_tlb_flushD_SE = armv7mp_tlb_flushD_SE;
+       }
+#endif
+}
+
 /*
  * Cannot panic here as we may not have a console yet ...
  */
@@ -2134,18 +2152,7 @@
 #if defined(CPU_CORTEX)
        if (CPU_ID_CORTEX_P(cputype)) {
                cpufuncs = armv7_cpufuncs;
-#ifdef MULTIPROCESSOR
-               /* If MP extensions are present, patch in MP TLB ops */
-               const uint32_t mpidr = armreg_mpidr_read();
-               if ((mpidr & (MPIDR_MP|MPIDR_U)) == MPIDR_MP) {
-                       cpufuncs.cf_tlb_flushID = armv7mp_tlb_flushID;
-                       cpufuncs.cf_tlb_flushID_SE = armv7mp_tlb_flushID_SE;
-                       cpufuncs.cf_tlb_flushI = armv7mp_tlb_flushI;
-                       cpufuncs.cf_tlb_flushI_SE = armv7mp_tlb_flushI_SE;
-                       cpufuncs.cf_tlb_flushD = armv7mp_tlb_flushD;
-                       cpufuncs.cf_tlb_flushD_SE = armv7mp_tlb_flushD_SE;
-               }
-#endif
+               set_cpufuncs_mpfixup();
                cpu_do_powersave = 1;                   /* Enable powersave */
 #if defined(CPU_ARMV6) || defined(CPU_PRE_ARMV6)
                cpu_armv7_p = true;
@@ -2171,6 +2178,7 @@
            cputype == CPU_ID_ARM_88SV581X_V7) &&
            (armreg_pfr0_read() & ARM_PFR0_THUMBEE_MASK)) {
                cpufuncs = pj4bv7_cpufuncs;
+               set_cpufuncs_mpfixup();
 #if defined(CPU_ARMV6) || defined(CPU_PRE_ARMV6)
                cpu_armv7_p = true;
 #endif