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[src/trunk]: src/sys/dev/pci/ixgbe Add "bool txr_no_space" for TX descriptor ...
details: https://anonhg.NetBSD.org/src/rev/9225b5e36cca
branches: trunk
changeset: 362027:9225b5e36cca
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed May 23 10:11:07 2018 +0000
description:
Add "bool txr_no_space" for TX descriptor shortage. Use it like IFF_OACTIVE.
diffstat:
sys/dev/pci/ixgbe/ix_txrx.c | 10 ++++++++--
sys/dev/pci/ixgbe/ixgbe.c | 4 +++-
sys/dev/pci/ixgbe/ixgbe.h | 3 ++-
sys/dev/pci/ixgbe/ixv.c | 4 +++-
4 files changed, 16 insertions(+), 5 deletions(-)
diffs (98 lines):
diff -r 517fb839b774 -r 9225b5e36cca sys/dev/pci/ixgbe/ix_txrx.c
--- a/sys/dev/pci/ixgbe/ix_txrx.c Wed May 23 10:00:27 2018 +0000
+++ b/sys/dev/pci/ixgbe/ix_txrx.c Wed May 23 10:11:07 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ix_txrx.c,v 1.46 2018/05/23 04:45:24 msaitoh Exp $ */
+/* $NetBSD: ix_txrx.c,v 1.47 2018/05/23 10:11:07 msaitoh Exp $ */
/******************************************************************************
@@ -146,7 +146,9 @@
}
if ((ifp->if_flags & IFF_RUNNING) == 0)
return (ENETDOWN);
-
+ if (txr->txr_no_space)
+ return (ENETDOWN);
+
while (!IFQ_IS_EMPTY(&ifp->if_snd)) {
if (txr->tx_avail <= IXGBE_QUEUE_MIN_FREE)
break;
@@ -291,6 +293,8 @@
}
if ((ifp->if_flags & IFF_RUNNING) == 0)
return (ENETDOWN);
+ if (txr->txr_no_space)
+ return (ENETDOWN);
/* Process the queue */
while ((next = pcq_get(txr->txr_interq)) != NULL) {
@@ -461,6 +465,7 @@
/* Make certain there are enough descriptors */
if (txr->tx_avail < (map->dm_nsegs + 2)) {
+ txr->txr_no_space = true;
txr->no_desc_avail.ev_count++;
ixgbe_dmamap_unload(txr->txtag, txbuf->map);
return EAGAIN;
@@ -1159,6 +1164,7 @@
buf->m_head = NULL;
}
buf->eop = NULL;
+ txr->txr_no_space = false;
++txr->tx_avail;
/* We clean the range if multi segment */
diff -r 517fb839b774 -r 9225b5e36cca sys/dev/pci/ixgbe/ixgbe.c
--- a/sys/dev/pci/ixgbe/ixgbe.c Wed May 23 10:00:27 2018 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.c Wed May 23 10:11:07 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.154 2018/05/23 04:37:13 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.155 2018/05/23 10:11:07 msaitoh Exp $ */
/******************************************************************************
@@ -703,6 +703,8 @@
/* Cache the tail address */
txr->tail = IXGBE_TDT(j);
+ txr->txr_no_space = false;
+
/* Disable Head Writeback */
/*
* Note: for X550 series devices, these registers are actually
diff -r 517fb839b774 -r 9225b5e36cca sys/dev/pci/ixgbe/ixgbe.h
--- a/sys/dev/pci/ixgbe/ixgbe.h Wed May 23 10:00:27 2018 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.h Wed May 23 10:11:07 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.h,v 1.48 2018/05/18 10:09:02 msaitoh Exp $ */
+/* $NetBSD: ixgbe.h,v 1.49 2018/05/23 10:11:07 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -368,6 +368,7 @@
pcq_t *txr_interq;
struct work wq_cookie;
void *txr_si;
+ bool txr_no_space; /* Like IFF_OACTIVE */
/* Flow Director */
u16 atr_sample;
diff -r 517fb839b774 -r 9225b5e36cca sys/dev/pci/ixgbe/ixv.c
--- a/sys/dev/pci/ixgbe/ixv.c Wed May 23 10:00:27 2018 +0000
+++ b/sys/dev/pci/ixgbe/ixv.c Wed May 23 10:11:07 2018 +0000
@@ -1,4 +1,4 @@
-/*$NetBSD: ixv.c,v 1.99 2018/05/23 04:37:13 msaitoh Exp $*/
+/*$NetBSD: ixv.c,v 1.100 2018/05/23 10:11:07 msaitoh Exp $*/
/******************************************************************************
@@ -1589,6 +1589,8 @@
/* Set Tx Tail register */
txr->tail = IXGBE_VFTDT(j);
+ txr->txr_no_space = false;
+
/* Set Ring parameters */
IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
(tdba & 0x00000000ffffffffULL));
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