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[src/trunk]: src/sys/dev/pci Add Flattening Portal Bridge capability ID and H...
details: https://anonhg.NetBSD.org/src/rev/837d78e3314b
branches: trunk
changeset: 353128:837d78e3314b
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Fri Apr 21 09:01:52 2017 +0000
description:
Add Flattening Portal Bridge capability ID and Hierarchy ID extended
capability ID.
diffstat:
sys/dev/pci/pci_subr.c | 11 +++++++++--
sys/dev/pci/pcireg.h | 4 +++-
2 files changed, 12 insertions(+), 3 deletions(-)
diffs (78 lines):
diff -r d7f96f1280a0 -r 837d78e3314b sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c Fri Apr 21 08:39:06 2017 +0000
+++ b/sys/dev/pci/pci_subr.c Fri Apr 21 09:01:52 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.176 2017/04/20 08:45:25 msaitoh Exp $ */
+/* $NetBSD: pci_subr.c,v 1.177 2017/04/21 09:01:52 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.176 2017/04/20 08:45:25 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.177 2017/04/21 09:01:52 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -2281,6 +2281,9 @@
onoff("Transaction Pending", reg, PCI_AFSR_TP);
}
+/* XXX pci_conf_print_ea_cap */
+/* XXX pci_conf_print_fpb_cap */
+
static struct {
pcireg_t cap;
const char *name;
@@ -2309,6 +2312,7 @@
{ PCI_CAP_SATA, "SATA", pci_conf_print_sata_cap },
{ PCI_CAP_PCIAF, "Advanced Features", pci_conf_print_pciaf_cap},
{ PCI_CAP_EA, "Enhanced Allocation", NULL }
+ { PCI_CAP_FPB, "Flattening Portal Bridge", NULL }
};
static int
@@ -3783,6 +3787,7 @@
/* XXX pci_conf_print_rtr_cap */
/* XXX pci_conf_print_desigvndsp_cap */
/* XXX pci_conf_print_vf_resizbar_cap */
+/* XXX pci_conf_print_hierarchyid_cap */
#undef MS
#undef SM
@@ -3867,6 +3872,8 @@
NULL },
{ PCI_EXTCAP_VF_RESIZBAR, "VF Resizable BARs",
NULL },
+ { PCI_EXTCAP_HIERARCHYID, "Hierarchy ID",
+ NULL },
};
static int
diff -r d7f96f1280a0 -r 837d78e3314b sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h Fri Apr 21 08:39:06 2017 +0000
+++ b/sys/dev/pci/pcireg.h Fri Apr 21 09:01:52 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.127 2017/04/20 08:45:25 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.128 2017/04/21 09:01:52 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -543,6 +543,7 @@
#define PCI_CAP_SATA 0x12
#define PCI_CAP_PCIAF 0x13
#define PCI_CAP_EA 0x14 /* Enhanced Allocation (EA) */
+#define PCI_CAP_FPB 0x15 /* Flattening Portal Bridge (FPB) */
/*
* Capability ID: 0x01
@@ -1441,6 +1442,7 @@
#define PCI_EXTCAP_RTR 0x0022 /* Readiness Time Reporting */
#define PCI_EXTCAP_DESIGVNDSP 0x0023 /* Designated Vendor-Specific */
#define PCI_EXTCAP_VF_RESIZBAR 0x0024 /* VF Resizable BAR */
+#define PCI_EXTCAP_HIERARCHYID 0x0028 /* Hierarchy ID */
/*
* Extended capability ID: 0x0001
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