[src/trunk]: src/sys/arch/arm/arm32 Check the "Havard TLB" maintenance operat...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9972697f1b74
branches:  trunk
changeset: 353808:9972697f1b74
user:      skrll <skrll%NetBSD.org@localhost>
date:      Wed May 24 06:31:07 2017 +0000

description:
Check the "Havard TLB" maintenance operations if the "Unified TLB"
maintenance opeations don't include invalidate by ASID.  Some CPUs, e.g.
Cortex-A8, have Havard TLBs and report ASID operations this way.

diffstat:

 sys/arch/arm/arm32/pmap.c |  6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diffs (27 lines):

diff -r ebdb6849cd1d -r 9972697f1b74 sys/arch/arm/arm32/pmap.c
--- a/sys/arch/arm/arm32/pmap.c Wed May 24 06:27:33 2017 +0000
+++ b/sys/arch/arm/arm32/pmap.c Wed May 24 06:31:07 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.348 2017/05/24 06:27:33 skrll Exp $ */
+/*     $NetBSD: pmap.c,v 1.349 2017/05/24 06:31:07 skrll Exp $ */
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -217,7 +217,7 @@
 
 #include <arm/locore.h>
 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.348 2017/05/24 06:27:33 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.349 2017/05/24 06:31:07 skrll Exp $");
 
 //#define PMAP_DEBUG
 #ifdef PMAP_DEBUG
@@ -7524,6 +7524,8 @@
         */
        if (__SHIFTOUT(armreg_mmfr2_read(), __BITS(16,19)) >= 2) {
                arm_has_tlbiasid_p = true;
+       } else if (__SHIFTOUT(armreg_mmfr2_read(), __BITS(12,15)) >= 2) {
+               arm_has_tlbiasid_p = true;
        }
 
        pte_l1_s_prot_u = L1_S_PROT_U_armv7;