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[src/trunk]: src/sys/arch Provide and use cpu_mpidr_aff_read in psci_fdt_boot...
details: https://anonhg.NetBSD.org/src/rev/dd4b672dc07e
branches: trunk
changeset: 365354:dd4b672dc07e
user: skrll <skrll%NetBSD.org@localhost>
date: Sun Aug 12 17:21:35 2018 +0000
description:
Provide and use cpu_mpidr_aff_read in psci_fdt_bootstrap
diffstat:
sys/arch/aarch64/include/armreg.h | 16 +++++++++++++++-
sys/arch/arm/fdt/psci_fdt.c | 16 ++++------------
sys/arch/arm/include/armreg.h | 14 ++++++++++++--
3 files changed, 31 insertions(+), 15 deletions(-)
diffs (122 lines):
diff -r 1c6607dbc5c9 -r dd4b672dc07e sys/arch/aarch64/include/armreg.h
--- a/sys/arch/aarch64/include/armreg.h Sun Aug 12 17:16:18 2018 +0000
+++ b/sys/arch/aarch64/include/armreg.h Sun Aug 12 17:21:35 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.17 2018/08/12 17:16:18 skrll Exp $ */
+/* $NetBSD: armreg.h,v 1.18 2018/08/12 17:21:35 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -1025,6 +1025,19 @@
#define icc_iar1_read reg_icc_iar1_el1_read
#define icc_eoi1r_write reg_icc_eoir1_el1_write
+#if defined(_KERNEL)
+
+/*
+ * CPU REGISTER ACCESS
+ */
+static __inline register_t
+cpu_mpidr_aff_read(void)
+{
+
+ return reg_mpidr_el1_read() &
+ (MPIDR_AFF3|MPIDR_AFF2|MPIDR_AFF1|MPIDR_AFF0);
+}
+
/*
* GENERIC TIMER REGISTER ACCESS
*/
@@ -1117,5 +1130,6 @@
return reg_cntv_cval_el0_read();
}
+#endif /* _KERNEL */
#endif /* _AARCH64_ARMREG_H_ */
diff -r 1c6607dbc5c9 -r dd4b672dc07e sys/arch/arm/fdt/psci_fdt.c
--- a/sys/arch/arm/fdt/psci_fdt.c Sun Aug 12 17:16:18 2018 +0000
+++ b/sys/arch/arm/fdt/psci_fdt.c Sun Aug 12 17:21:35 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: psci_fdt.c,v 1.11 2018/08/10 22:34:36 jmcneill Exp $ */
+/* $NetBSD: psci_fdt.c,v 1.12 2018/08/12 17:21:36 skrll Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: psci_fdt.c,v 1.11 2018/08/10 22:34:36 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: psci_fdt.c,v 1.12 2018/08/12 17:21:36 skrll Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -154,14 +154,6 @@
}
#ifdef MULTIPROCESSOR
-static bus_addr_t psci_fdt_read_mpidr_aff(void)
-{
-#ifdef __aarch64__
- return reg_mpidr_el1_read() & (MPIDR_AFF3|MPIDR_AFF2|MPIDR_AFF1|MPIDR_AFF0);
-#else
- return armreg_mpidr_read() & (MPIDR_AFF2|MPIDR_AFF1|MPIDR_AFF0);
-#endif
-}
static register_t
psci_fdt_mpstart_pa(void)
@@ -181,7 +173,7 @@
{
#ifdef MULTIPROCESSOR
extern void cortex_mpstart(void);
- bus_addr_t mpidr, bp_mpidr;
+ uint64_t mpidr, bp_mpidr;
int child;
const int cpus = OF_finddevice("/cpus");
@@ -201,7 +193,7 @@
return;
/* MPIDR affinity levels of boot processor. */
- bp_mpidr = psci_fdt_read_mpidr_aff();
+ bp_mpidr = cpu_mpidr_aff_read();
/* Boot APs */
uint32_t started = 0;
diff -r 1c6607dbc5c9 -r dd4b672dc07e sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h Sun Aug 12 17:16:18 2018 +0000
+++ b/sys/arch/arm/include/armreg.h Sun Aug 12 17:21:35 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.122 2018/07/15 23:46:57 jmcneill Exp $ */
+/* $NetBSD: armreg.h,v 1.123 2018/08/12 17:21:36 skrll Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -908,6 +908,15 @@
ARMREG_READ_INLINE(sheeva_xctrl, "p15,1,%0,c15,c1,0") /* Sheeva eXtra Control register */
ARMREG_WRITE_INLINE(sheeva_xctrl, "p15,1,%0,c15,c1,0") /* Sheeva eXtra Control register */
+#if defined(_KERNEL)
+
+static inline uint64_t
+cpu_mpidr_aff_read(void)
+{
+
+ return armreg_mpidr_read() & (MPIDR_AFF2|MPIDR_AFF1|MPIDR_AFF0);
+}
+
/*
* GENERIC TIMER register access
*/
@@ -1002,7 +1011,8 @@
return armreg_cntv_cval_read();
}
-#endif /* !__ASSEMBLER__ */
+#endif /* _KERNEL */
+#endif /* !__ASSEMBLER && !_RUMPKERNEL */
#elif defined(__aarch64__)
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