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[src/trunk]: src/sys/dev/pci Add ATS Relaxed Ordering supported bit described...
details: https://anonhg.NetBSD.org/src/rev/0def35232ffd
branches: trunk
changeset: 433389:0def35232ffd
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed Sep 12 07:42:21 2018 +0000
description:
Add ATS Relaxed Ordering supported bit described in Address Translation
Relaxed Ordering ECN.
diffstat:
sys/dev/pci/pci_subr.c | 5 +++--
sys/dev/pci/pcireg.h | 3 ++-
2 files changed, 5 insertions(+), 3 deletions(-)
diffs (43 lines):
diff -r 63703d196a79 -r 0def35232ffd sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c Wed Sep 12 05:03:05 2018 +0000
+++ b/sys/dev/pci/pci_subr.c Wed Sep 12 07:42:21 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.202 2018/07/03 04:56:59 msaitoh Exp $ */
+/* $NetBSD: pci_subr.c,v 1.203 2018/09/12 07:42:22 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.202 2018/07/03 04:56:59 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.203 2018/09/12 07:42:22 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -3152,6 +3152,7 @@
printf(" Invalidate Queue Depth: %u\n", num);
onoff("Page Aligned Request", reg, PCI_ATS_CAP_PALIGNREQ);
onoff("Global Invalidate", reg, PCI_ATS_CAP_GLOBALINVL);
+ onoff("Relaxed Ordering", reg, PCI_ATS_CAP_RELAXORD);
printf(" Control register: 0x%04x\n", ctl);
printf(" Smallest Translation Unit: %u\n",
diff -r 63703d196a79 -r 0def35232ffd sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h Wed Sep 12 05:03:05 2018 +0000
+++ b/sys/dev/pci/pcireg.h Wed Sep 12 07:42:21 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.139 2018/07/02 03:52:32 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.140 2018/09/12 07:42:21 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -1770,6 +1770,7 @@
#define PCI_ATS_CAP_INVQDEPTH __BITS(4, 0) /* Invalidate Queue Depth */
#define PCI_ATS_CAP_PALIGNREQ __BIT(5) /* Page Aligned Request */
#define PCI_ATS_CAP_GLOBALINVL __BIT(6) /* Global Invalidate Support */
+#define PCI_ATS_CAP_RELAXORD __BIT(7) /* Relaxed Ordering */
#define PCI_ATS_CTL 0x04 /* Control Register */
#define PCI_ATS_CTL_STU __BITS(20, 16) /* Smallest Translation Unit */
#define PCI_ATS_CTL_EN __BIT(31) /* Enable */
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