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[src/trunk]: src/sys/dev/i2c Add support for RK805
details: https://anonhg.NetBSD.org/src/rev/5a13b06566b0
branches: trunk
changeset: 433551:5a13b06566b0
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Thu Sep 20 09:02:46 2018 +0000
description:
Add support for RK805
diffstat:
sys/dev/i2c/rkpmic.c | 50 +++++++++++++++++++++++++++++++++++++++++++++++---
1 files changed, 47 insertions(+), 3 deletions(-)
diffs (92 lines):
diff -r 674e3b9a8a75 -r 5a13b06566b0 sys/dev/i2c/rkpmic.c
--- a/sys/dev/i2c/rkpmic.c Thu Sep 20 07:18:38 2018 +0000
+++ b/sys/dev/i2c/rkpmic.c Thu Sep 20 09:02:46 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rkpmic.c,v 1.1 2018/09/02 01:16:58 jmcneill Exp $ */
+/* $NetBSD: rkpmic.c,v 1.2 2018/09/20 09:02:46 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rkpmic.c,v 1.1 2018/09/02 01:16:58 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rkpmic.c,v 1.2 2018/09/20 09:02:46 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -52,6 +52,8 @@
uint8_t vsel_mask;
u_int base;
u_int step;
+ u_int flags;
+#define F_ENABLE_WRITE_MASK 0x00
};
struct rkpmic_config {
@@ -60,6 +62,44 @@
u_int nctrl;
};
+static const struct rkpmic_ctrl rk805_ctrls[] = {
+ /* DCDC */
+ { .name = "DCDC_REG1", .flags = F_ENABLE_WRITE_MASK,
+ .enable_reg = 0x23, .enable_mask = __BIT(0),
+ .vsel_reg = 0x2f, .vsel_mask = __BITS(5,0),
+ .base = 712500, .step = 12500 },
+ { .name = "DCDC_REG2", .flags = F_ENABLE_WRITE_MASK,
+ .enable_reg = 0x23, .enable_mask = __BIT(1),
+ .vsel_reg = 0x33, .vsel_mask = __BITS(5,0),
+ .base = 712500, .step = 12500 },
+ { .name = "DCDC_REG3", .flags = F_ENABLE_WRITE_MASK,
+ .enable_reg = 0x23, .enable_mask = __BIT(2) },
+ { .name = "DCDC_REG4", .flags = F_ENABLE_WRITE_MASK,
+ .enable_reg = 0x23, .enable_mask = __BIT(3),
+ .vsel_reg = 0x38, .vsel_mask = __BITS(3,0),
+ .base = 800000, .step = 100000 },
+
+ /* LDO */
+ { .name = "LDO_REG1", .flags = F_ENABLE_WRITE_MASK,
+ .enable_reg = 0x27, .enable_mask = __BIT(0),
+ .vsel_reg = 0x3b, .vsel_mask = __BITS(4,0),
+ .base = 800000, .step = 100000 },
+ { .name = "LDO_REG2", .flags = F_ENABLE_WRITE_MASK,
+ .enable_reg = 0x27, .enable_mask = __BIT(1),
+ .vsel_reg = 0x3d, .vsel_mask = __BITS(4,0),
+ .base = 800000, .step = 100000 },
+ { .name = "LDO_REG3", .flags = F_ENABLE_WRITE_MASK,
+ .enable_reg = 0x27, .enable_mask = __BIT(2),
+ .vsel_reg = 0x3f, .vsel_mask = __BITS(4,0),
+ .base = 800000, .step = 100000 },
+};
+
+static const struct rkpmic_config rk805_config = {
+ .name = "RK805",
+ .ctrl = rk805_ctrls,
+ .nctrl = __arraycount(rk805_ctrls),
+};
+
static const struct rkpmic_ctrl rk808_ctrls[] = {
/* DCDC */
{ .name = "DCDC_REG1",
@@ -145,6 +185,7 @@
};
static const struct device_compatible_entry compat_data[] = {
+ { "rockchip,rk805", (uintptr_t)&rk805_config },
{ "rockchip,rk808", (uintptr_t)&rk808_config },
{ NULL }
};
@@ -252,7 +293,10 @@
return EINVAL;
I2C_LOCK(sc->sc_pmic);
- val = I2C_READ(sc->sc_pmic, c->enable_reg);
+ if (c->flags & F_ENABLE_WRITE_MASK)
+ val |= c->enable_mask << 4;
+ else
+ val = I2C_READ(sc->sc_pmic, c->enable_reg);
if (enable)
val |= c->enable_mask;
else
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