[src/trunk]: src/sys/arch/arm/arm Add the ARM ARM cache operation name in som...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/af5f88afd64a
branches:  trunk
changeset: 433819:af5f88afd64a
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat Oct 06 15:54:55 2018 +0000

description:
Add the ARM ARM cache operation name in some comments

diffstat:

 sys/arch/arm/arm/cpufunc_asm_armv7.S |  8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diffs (39 lines):

diff -r 776761827cad -r af5f88afd64a sys/arch/arm/arm/cpufunc_asm_armv7.S
--- a/sys/arch/arm/arm/cpufunc_asm_armv7.S      Sat Oct 06 15:33:35 2018 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_armv7.S      Sat Oct 06 15:54:55 2018 +0000
@@ -347,7 +347,7 @@
        mov     r2, ip                  @ r2 now contains set way decr
 
        /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */
-1:     mcr     p15, 0, r3, c7, c6, 2   @ invalidate line
+1:     mcr     p15, 0, r3, c7, c6, 2   @ DCISW (data cache invalidate by set/way)
        movs    r0, r3                  @ get current way/set
        beq     2f                      @ at 0 means we are done.
        lsls    r0, r0, #10             @ clear way bits leaving only set bits
@@ -391,7 +391,7 @@
        sub     r2, r2, r0              @ subtract from way decr
 
        /* r3 = ways/sets/level, r2 = way decr, r1 = set decr, r0 and ip are free */
-1:     mcr     p15, 0, r3, c7, c6, 2   @ invalidate line
+1:     mcr     p15, 0, r3, c7, c6, 2   @ DCISW (data cache invalidate by set/way)
        cmp     r3, #15                 @ are we done with this level (way/set == 0)
        bls     .Ldone_l1inv            @ yes, we've finished
        ubfx    r0, r3, #4, #18         @ extract set bits
@@ -445,7 +445,7 @@
        sub     r2, r2, r0              @ subtract from way decr
 
        /* r3 = ways/sets/level, r2 = way decr, r1 = set decr, r0 and ip are free */
-1:     mcr     p15, 0, r3, c7, c6, 2   @ invalidate line
+1:     mcr     p15, 0, r3, c7, c6, 2   @ DCISW (data cache invalidate by set/way)
        cmp     r3, #15                 @ are we done with this level (way/set == 0)
        bls     .Lnext_level_inv        @ yes, go to next level
        ubfx    r0, r3, #4, #18         @ extract set bits
@@ -506,7 +506,7 @@
        sub     r2, r2, r0              @ subtract from way decr
 
        /* r3 = ways/sets/level, r2 = way decr, r1 = set decr, r0 and ip are free */
-1:     mcr     p15, 0, r3, c7, c14, 2  @ writeback and invalidate line
+1:     mcr     p15, 0, r3, c7, c14, 2  @ DCCISW (data cache clean and invalidate by set/way)
        cmp     r3, #15                 @ are we done with this level (way/set == 0)
        bls     .Lnext_level_wbinv      @ yes, go to next level
        ubfx    r0, r3, #4, #18         @ extract set bits