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[src/trunk]: src/sys/dev/ic Allow bus glue to reserve pins for private use
details: https://anonhg.NetBSD.org/src/rev/1f2d6d3ac7ce
branches: trunk
changeset: 445300:1f2d6d3ac7ce
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun Oct 21 18:31:14 2018 +0000
description:
Allow bus glue to reserve pins for private use
diffstat:
sys/dev/ic/pl061.c | 7 ++++---
sys/dev/ic/pl061var.h | 4 +++-
2 files changed, 7 insertions(+), 4 deletions(-)
diffs (46 lines):
diff -r fe60bbbcb988 -r 1f2d6d3ac7ce sys/dev/ic/pl061.c
--- a/sys/dev/ic/pl061.c Sun Oct 21 13:41:15 2018 +0000
+++ b/sys/dev/ic/pl061.c Sun Oct 21 18:31:14 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pl061.c,v 1.1 2018/10/15 23:50:48 jmcneill Exp $ */
+/* $NetBSD: pl061.c,v 1.2 2018/10/21 18:31:14 jmcneill Exp $ */
/*
* Copyright (c) 2018 Jonathan A. Kollasch
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pl061.c,v 1.1 2018/10/15 23:50:48 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pl061.c,v 1.2 2018/10/21 18:31:14 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -55,7 +55,8 @@
sc->sc_gc.gp_pin_write = plgpio_pin_write;
sc->sc_gc.gp_pin_ctl = plgpio_pin_ctl;
- const uint32_t cnf = PLGPIO_READ(sc, PL061_GPIOAFSEL_REG);
+ const uint32_t cnf = PLGPIO_READ(sc, PL061_GPIOAFSEL_REG) |
+ sc->sc_reserved_mask;
for (pin = 0; pin < 8; pin++) {
sc->sc_pins[pin].pin_num = pin;
diff -r fe60bbbcb988 -r 1f2d6d3ac7ce sys/dev/ic/pl061var.h
--- a/sys/dev/ic/pl061var.h Sun Oct 21 13:41:15 2018 +0000
+++ b/sys/dev/ic/pl061var.h Sun Oct 21 18:31:14 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pl061var.h,v 1.1 2018/10/15 23:50:48 jmcneill Exp $ */
+/* $NetBSD: pl061var.h,v 1.2 2018/10/21 18:31:14 jmcneill Exp $ */
/*
* Copyright (c) 2018 Jonathan A. Kollasch
@@ -36,6 +36,8 @@
struct gpio_chipset_tag sc_gc;
gpio_pin_t sc_pins[8];
+
+ uint32_t sc_reserved_mask;
};
void plgpio_attach(struct plgpio_softc *);
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