[src/trunk]: src/sys/dev/pci Handle Cavium AHCI/RAID controller BAR weirdness.

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/084d589c87ed
branches:  trunk
changeset: 446122:084d589c87ed
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat Nov 24 15:35:45 2018 +0000

description:
Handle Cavium AHCI/RAID controller BAR weirdness.

Support 64bit BARs as well.

diffstat:

 sys/dev/pci/ahcisata_pci.c |  33 +++++++++++++++++++++++++--------
 1 files changed, 25 insertions(+), 8 deletions(-)

diffs (75 lines):

diff -r 8bc668ef66d5 -r 084d589c87ed sys/dev/pci/ahcisata_pci.c
--- a/sys/dev/pci/ahcisata_pci.c        Sat Nov 24 14:50:04 2018 +0000
+++ b/sys/dev/pci/ahcisata_pci.c        Sat Nov 24 15:35:45 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ahcisata_pci.c,v 1.45 2018/11/20 15:16:43 prlw1 Exp $  */
+/*     $NetBSD: ahcisata_pci.c,v 1.46 2018/11/24 15:35:45 skrll Exp $  */
 
 /*
  * Copyright (c) 2006 Manuel Bouyer.
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.45 2018/11/20 15:16:43 prlw1 Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.46 2018/11/24 15:35:45 skrll Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_ahcisata_pci.h"
@@ -220,6 +220,8 @@
     ahci_pci_match, ahci_pci_attach, ahci_pci_detach, NULL,
     NULL, ahci_pci_childdetached, DVF_DETACH_SHUTDOWN);
 
+#define        AHCI_PCI_ABAR_CAVIUM    0x10
+
 static int
 ahci_pci_has_quirk(pci_vendor_id_t vendor, pci_product_id_t product)
 {
@@ -233,6 +235,20 @@
 }
 
 static int
+ahci_pci_abar(struct pci_attach_args *pa)
+{
+       if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CAVIUM) {
+               if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CAVIUM_THUNDERX_AHCI ||
+                   PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CAVIUM_THUNDERX_RAID) {
+                       return AHCI_PCI_ABAR_CAVIUM;
+               }
+       }
+
+       return AHCI_PCI_ABAR;
+}
+
+
+static int
 ahci_pci_match(device_t parent, cfdata_t match, void *aux)
 {
        struct pci_attach_args *pa = aux;
@@ -253,9 +269,9 @@
            (force == false))
                return 0;
 
-       if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
-           PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
-           &regt, &regh, NULL, &size) != 0)
+       int bar = ahci_pci_abar(pa);
+       pcireg_t memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, bar);
+       if (pci_mapreg_map(pa, bar, memtype, 0, &regt, &regh, NULL, &size) != 0)
                return 0;
 
        if ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
@@ -281,9 +297,10 @@
 
        sc->sc_atac.atac_dev = self;
 
-       if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
-           PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
-           &sc->sc_ahcit, &sc->sc_ahcih, NULL, &sc->sc_ahcis) != 0) {
+       int bar = ahci_pci_abar(pa);
+       pcireg_t memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, bar);
+       if (pci_mapreg_map(pa, bar, memtype, 0, &sc->sc_ahcit, &sc->sc_ahcih,
+           NULL, &sc->sc_ahcis) != 0) {
                aprint_error_dev(self, "can't map ahci registers\n");
                return;
        }