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[src/trunk]: src/lib/libkvm Fix _kvm_kvatop so that it now works.
details: https://anonhg.NetBSD.org/src/rev/132d8c6b033c
branches: trunk
changeset: 446770:132d8c6b033c
user: skrll <skrll%NetBSD.org@localhost>
date: Tue Dec 18 16:25:47 2018 +0000
description:
Fix _kvm_kvatop so that it now works.
diffstat:
lib/libkvm/kvm_aarch64.c | 40 ++++++++++++++++++----------------------
1 files changed, 18 insertions(+), 22 deletions(-)
diffs (107 lines):
diff -r b1f5318d78c8 -r 132d8c6b033c lib/libkvm/kvm_aarch64.c
--- a/lib/libkvm/kvm_aarch64.c Tue Dec 18 16:23:20 2018 +0000
+++ b/lib/libkvm/kvm_aarch64.c Tue Dec 18 16:25:47 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: kvm_aarch64.c,v 1.5 2018/11/09 04:06:40 mrg Exp $ */
+/* $NetBSD: kvm_aarch64.c,v 1.6 2018/12/18 16:25:47 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -48,7 +48,7 @@
#include "kvm_private.h"
-__RCSID("$NetBSD: kvm_aarch64.c,v 1.5 2018/11/09 04:06:40 mrg Exp $");
+__RCSID("$NetBSD: kvm_aarch64.c,v 1.6 2018/12/18 16:25:47 skrll Exp $");
/*ARGSUSED*/
void
@@ -83,27 +83,24 @@
}
const cpu_kcore_hdr_t * const cpu_kh = kd->cpu_data;
- const uint64_t tg1 = cpu_kh->kh_tcr1 & TCR_TG1;
+ const uint64_t tg1 = cpu_kh->kh_tcr1 & TCR_TG1;
const u_int t1siz = __SHIFTOUT(cpu_kh->kh_tcr1, TCR_T1SZ);
+ const u_int inputsz = 64 - t1siz;
/*
* Real kernel virtual address: do the translation.
*/
- u_int va_bits;
u_int page_shift;
switch (tg1) {
case TCR_TG1_4KB:
- va_bits = t1siz + 36;
page_shift = 12;
break;
case TCR_TG1_16KB:
- va_bits = 48;
page_shift = 14;
break;
case TCR_TG1_64KB:
- va_bits = t1siz + 38;
page_shift = 16;
break;
default:
@@ -111,28 +108,27 @@
}
const size_t page_size = 1 << page_shift;
- const uint64_t page_mask = (page_size - 1);
- const uint64_t page_addr = __BITS(47, 0) & ~page_mask;
- const uint64_t pte_mask = page_mask >> 3;
+ const uint64_t page_mask = __BITS(page_shift - 1, 0);
+ const uint64_t page_addr = __BITS(47, page_shift);
const u_int pte_shift = page_shift - 3;
- /* how many level of page tables do we have? */
- u_int level = (48 + page_shift - 1) / page_shift;
+ /* how many levels of page tables do we have? */
+ u_int levels = howmany(inputsz - page_shift, pte_shift);
/* restrict va to the valid VA bits */
- va &= (1LL << va_bits) - 1;
+ va &= __BITS(inputsz - 1, 0);
- u_int addr_shift = page_shift + (level - 1) * pte_shift;
+ u_int addr_shift = page_shift + (levels - 1) * pte_shift;
/* clear out the unused low bits of the table address */
- paddr_t pte_addr = (cpu_kh->kh_ttbr1 & TTBR_BADDR);
- pte_addr &= ~((8L << (va_bits - addr_shift)) - 1);
+ paddr_t pte_addr = cpu_kh->kh_ttbr1 & TTBR_BADDR;
for (;;) {
pt_entry_t pte;
/* now index into the pte table */
- pte_addr += 8 * ((va >> addr_shift) & pte_mask);
+ const u_int idx_mask = __BITS(addr_shift + pte_shift - 1, addr_shift);
+ pte_addr += 8 * __SHIFTOUT(va, idx_mask);
/* Find and read the PTE. */
if (_kvm_pread(kd, kd->pmfd, &pte, sizeof(pte),
@@ -148,15 +144,15 @@
}
if ((pte & LX_TYPE) == LX_TYPE_BLK) {
- const paddr_t blk_mask = ((1L << addr_shift) - 1);
+ const size_t blk_size = 1 << addr_shift;
+ const paddr_t blk_mask = __BITS(addr_shift - 1, 0);
*pa = (pte & page_addr & ~blk_mask) | (va & blk_mask);
- return 0;
+ return blk_size - (va & blk_mask);
}
-
- if (level == page_shift) {
+ if (--levels == 0) {
*pa = (pte & page_addr) | (va & page_mask);
- return 0;
+ return page_size - (va & page_mask);
}
/*
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