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[src/trunk]: src/sys/dev/pci KNF. No functional change.
details: https://anonhg.NetBSD.org/src/rev/6b8bbbe2e685
branches: trunk
changeset: 447351:6b8bbbe2e685
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Tue Jan 08 06:55:50 2019 +0000
description:
KNF. No functional change.
diffstat:
sys/dev/pci/if_bnx.c | 66 ++++++++++++++++++++++-----------------------------
1 files changed, 29 insertions(+), 37 deletions(-)
diffs (183 lines):
diff -r 6f32f9b24305 -r 6b8bbbe2e685 sys/dev/pci/if_bnx.c
--- a/sys/dev/pci/if_bnx.c Tue Jan 08 06:34:23 2019 +0000
+++ b/sys/dev/pci/if_bnx.c Tue Jan 08 06:55:50 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bnx.c,v 1.65 2018/06/26 06:48:01 msaitoh Exp $ */
+/* $NetBSD: if_bnx.c,v 1.66 2019/01/08 06:55:50 msaitoh Exp $ */
/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
/*-
@@ -35,7 +35,7 @@
#if 0
__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
#endif
-__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.65 2018/06/26 06:48:01 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.66 2019/01/08 06:55:50 msaitoh Exp $");
/*
* The following controllers are supported by this driver:
@@ -354,8 +354,7 @@
/* BNX Firmware Synchronization and Load */
/****************************************************************************/
int bnx_fw_sync(struct bnx_softc *, uint32_t);
-void bnx_load_rv2p_fw(struct bnx_softc *, uint32_t *, uint32_t,
- uint32_t);
+void bnx_load_rv2p_fw(struct bnx_softc *, uint32_t *, uint32_t, uint32_t);
void bnx_load_cpu_fw(struct bnx_softc *, struct cpu_reg *,
struct fw_info *);
void bnx_init_cpus(struct bnx_softc *);
@@ -463,7 +462,7 @@
BNXNUM(sc), 'A' + BNXREV(sc), BNXMETAL(sc),
(BNX_CHIP_BOND_ID(sc) == BNX_CHIP_BOND_ID_SERDES_BIT)
? "Serdes " : "", sc->bnx_chipid);
-
+
/* Bus info. */
if (sc->bnx_flags & BNX_PCIE_FLAG) {
aprint_normal_dev(sc->bnx_dev, "PCIe x%d ",
@@ -1110,8 +1109,8 @@
/* Make sure we are accessing the correct PHY address. */
if (phy != sc->bnx_phy_addr) {
- DBPRINT(sc, BNX_WARN, "Invalid PHY address %d for PHY write!\n",
- phy);
+ DBPRINT(sc, BNX_WARN,
+ "Invalid PHY address %d for PHY write!\n", phy);
return;
}
@@ -3262,9 +3261,8 @@
uint32_t vcid_addr, offset;
/*
- * For the 5706/5708, context memory is local to
- * the controller, so initialize the controller
- * context memory.
+ * For the 5706/5708, context memory is local to the
+ * controller, so initialize the controller context memory.
*/
vcid_addr = GET_CID_ADDR(96);
@@ -3275,9 +3273,9 @@
REG_WR(sc, BNX_CTX_VIRT_ADDR, 0);
REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);
- for(offset = 0; offset < BNX_PHY_CTX_SIZE; offset += 4) {
+ for (offset = 0; offset < BNX_PHY_CTX_SIZE;
+ offset += 4)
CTX_WR(sc, 0x00, offset, 0);
- }
REG_WR(sc, BNX_CTX_VIRT_ADDR, vcid_addr);
REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);
@@ -4450,10 +4448,10 @@
}
#endif
- /* DRC - ToDo: If the received packet is small, say less
- * than 128 bytes, allocate a new mbuf here,
- * copy the data to that mbuf, and recycle
- * the mapped jumbo frame.
+ /* DRC - ToDo: If the received packet is small, say
+ * less than 128 bytes, allocate a new mbuf
+ * here, copy the data to that mbuf, and
+ * recycle the mapped jumbo frame.
*/
/* Unmap the mbuf from DMA space. */
@@ -4585,10 +4583,8 @@
/* Check for an IP datagram. */
if (status & L2_FHDR_STATUS_IP_DATAGRAM) {
/* Check if the IP checksum is valid. */
- if ((l2fhdr->l2_fhdr_ip_xsum ^ 0xffff)
- == 0)
- m->m_pkthdr.csum_flags |=
- M_CSUM_IPv4;
+ if ((l2fhdr->l2_fhdr_ip_xsum ^ 0xffff) == 0)
+ m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
#ifdef BNX_DEBUG
else
DBPRINT(sc, BNX_WARN_SEND,
@@ -4872,8 +4868,7 @@
}
- DBPRINT(sc, BNX_INFO, "%s(): setting MRU = %d\n",
- __func__, ether_mtu);
+ DBPRINT(sc, BNX_INFO, "%s(): setting MRU = %d\n", __func__, ether_mtu);
/*
* Program the MRU and enable Jumbo frame
@@ -4989,9 +4984,9 @@
}
bus_dmamap_sync(sc->bnx_dmatag, map, 0, map->dm_mapsize,
BUS_DMASYNC_PREWRITE);
- /* Make sure there's room in the chain */
+ /* Make sure there's room in the chain */
if (map->dm_nsegs > (sc->max_tx_bd - sc->used_tx_bd))
- goto nospace;
+ goto nospace;
/* prod points to an empty tx_bd at this point. */
prod_bseq = sc->tx_prod_bseq;
@@ -5147,9 +5142,9 @@
tx_chain_prod = TX_CHAIN_IDX(sc->tx_prod);
#endif
- DBPRINT(sc, BNX_INFO_SEND, "%s(): End: tx_prod = 0x%04X, tx_chain_prod "
- "= 0x%04X, tx_prod_bseq = 0x%08X\n", __func__, sc->tx_prod,
- tx_chain_prod, sc->tx_prod_bseq);
+ DBPRINT(sc, BNX_INFO_SEND, "%s(): End: tx_prod = 0x%04X, "
+ "tx_chain_prod = 0x%04X, tx_prod_bseq = 0x%08X\n",
+ __func__, sc->tx_prod, tx_chain_prod, sc->tx_prod_bseq);
/* Start the transmit. */
REG_WR16(sc, MB_TX_CID_ADDR + BNX_L2CTX_TX_HOST_BIDX, sc->tx_prod);
@@ -5315,8 +5310,7 @@
~STATUS_ATTN_BITS_LINK_STATE))) {
DBRUN(1, sc->unexpected_attentions++);
- BNX_PRINTF(sc,
- "Fatal attention detected: 0x%08X\n",
+ BNX_PRINTF(sc, "Fatal attention detected: 0x%08X\n",
sblk->status_attn_bits);
DBRUN(BNX_FATAL,
@@ -5328,13 +5322,11 @@
}
/* Check for any completed RX frames. */
- if (sblk->status_rx_quick_consumer_index0 !=
- sc->hw_rx_cons)
+ if (sblk->status_rx_quick_consumer_index0 != sc->hw_rx_cons)
bnx_rx_intr(sc);
/* Check for any completed TX frames. */
- if (sblk->status_tx_quick_consumer_index0 !=
- sc->hw_tx_cons)
+ if (sblk->status_tx_quick_consumer_index0 != sc->hw_tx_cons)
bnx_tx_intr(sc);
/*
@@ -5738,8 +5730,8 @@
aprint_debug("\n");
if (mp->m_flags & M_EXT)
- aprint_debug("- m_ext: vaddr = %p, ext_size = 0x%04zX\n",
- mp, mp->m_ext.ext_size);
+ aprint_debug("- m_ext: vaddr = %p, "
+ "ext_size = 0x%04zX\n", mp, mp->m_ext.ext_size);
mp = mp->m_next;
}
@@ -5953,8 +5945,8 @@
sblk = sc->status_block;
- aprint_debug_dev(sc->bnx_dev, "----------------------------- Status Block "
- "-----------------------------\n");
+ aprint_debug_dev(sc->bnx_dev, "----------------------------- "
+ "Status Block -----------------------------\n");
BNX_PRINTF(sc,
"attn_bits = 0x%08X, attn_bits_ack = 0x%08X, index = 0x%04X\n",
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