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[src/trunk]: src/sys/arch/arm/dts Add operating points and clocks for CPUs



details:   https://anonhg.NetBSD.org/src/rev/3d353f632500
branches:  trunk
changeset: 447658:3d353f632500
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Jan 20 17:29:04 2019 +0000

description:
Add operating points and clocks for CPUs

diffstat:

 sys/arch/arm/dts/meson8b.dtsi |  80 ++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 79 insertions(+), 1 deletions(-)

diffs (94 lines):

diff -r f7c3ee01dd3e -r 3d353f632500 sys/arch/arm/dts/meson8b.dtsi
--- a/sys/arch/arm/dts/meson8b.dtsi     Sun Jan 20 17:28:34 2019 +0000
+++ b/sys/arch/arm/dts/meson8b.dtsi     Sun Jan 20 17:29:04 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: meson8b.dtsi,v 1.3 2019/01/20 00:44:01 jmcneill Exp $ */
+/* $NetBSD: meson8b.dtsi,v 1.4 2019/01/20 17:29:04 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -43,6 +43,84 @@
                      <0xd0100000 0x100000>;    /* VPU */
                status = "disabled";
        };
+
+       cpu_opp_table: opp-table {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-96000000 {
+                       opp-hz = /bits/ 64 <96000000>;
+                       opp-microvolt = <860000>;
+               };
+               opp-192000000 {
+                       opp-hz = /bits/ 64 <192000000>;
+                       opp-microvolt = <860000>;
+               };
+               opp-312000000 {
+                       opp-hz = /bits/ 64 <312000000>;
+                       opp-microvolt = <860000>;
+               };
+               opp-408000000 {
+                       opp-hz = /bits/ 64 <408000000>;
+                       opp-microvolt = <860000>;
+               };
+               opp-504000000 {
+                       opp-hz = /bits/ 64 <504000000>;
+                       opp-microvolt = <860000>;
+               };
+               opp-600000000 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <860000>;
+               };
+               opp-720000000 {
+                       opp-hz = /bits/ 64 <720000000>;
+                       opp-microvolt = <860000>;
+               };
+               opp-816000000 {
+                       opp-hz = /bits/ 64 <816000000>;
+                       opp-microvolt = <900000>;
+               };
+               opp-1008000000 {
+                       opp-hz = /bits/ 64 <1008000000>;
+                       opp-microvolt = <1140000>;
+               };
+               opp-1200000000 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <1140000>;
+               };
+               opp-1320000000 {
+                       opp-hz = /bits/ 64 <1320000000>;
+                       opp-microvolt = <1140000>;
+               };
+               opp-1488000000 {
+                       opp-hz = /bits/ 64 <1488000000>;
+                       opp-microvolt = <1140000>;
+               };
+               opp-1536000000 {
+                       opp-hz = /bits/ 64 <1536000000>;
+                       opp-microvolt = <1140000>;
+               };
+       };
+};
+
+&cpu0 {
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPUCLK>;
+};
+
+&cpu1 {
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPUCLK>;
+};
+
+&cpu2 {
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPUCLK>;
+};
+
+&cpu3 {
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPUCLK>;
 };
 
 &pinctrl_cbus {



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