[src/trunk]: src/sys/arch/arm/xscale Hard-align the fields of the structures ...

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/51bcd54a3ed3
branches:  trunk
changeset: 449699:51bcd54a3ed3
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sun Mar 17 06:36:22 2019 +0000

description:
Hard-align the fields of the structures with __aligned(32), and pass ioff=0
in the pool cache.

diffstat:

 sys/arch/arm/xscale/iopaau.c    |  10 +++++-----
 sys/arch/arm/xscale/iopaaureg.h |  10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diffs (80 lines):

diff -r 8650c830d4a3 -r 51bcd54a3ed3 sys/arch/arm/xscale/iopaau.c
--- a/sys/arch/arm/xscale/iopaau.c      Sun Mar 17 06:17:30 2019 +0000
+++ b/sys/arch/arm/xscale/iopaau.c      Sun Mar 17 06:36:22 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: iopaau.c,v 1.17 2012/02/12 16:31:01 matt Exp $ */
+/*     $NetBSD: iopaau.c,v 1.18 2019/03/17 06:36:22 maxv Exp $ */
 
 /*
  * Copyright (c) 2002 Wasabi Systems, Inc.
@@ -43,7 +43,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iopaau.c,v 1.17 2012/02/12 16:31:01 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: iopaau.c,v 1.18 2019/03/17 06:36:22 maxv Exp $");
 
 #include <sys/param.h>
 #include <sys/pool.h>
@@ -647,13 +647,13 @@
 
        /*
         * Initialize global resources.  Ok to do here, since there's
-        * only one AAU.
+        * only one AAU.  The structures are 32-byte aligned.
         */
        iopaau_desc_4_cache = pool_cache_init(sizeof(struct aau_desc_4),
-           8 * 4, offsetof(struct aau_desc_4, d_nda), 0, "aaud4pl",
+           8 * 4, 0, 0, "aaud4pl",
            NULL, IPL_VM, iopaau_desc_ctor, NULL, NULL);
        iopaau_desc_8_cache = pool_cache_init(sizeof(struct aau_desc_8),
-           8 * 4, offsetof(struct aau_desc_8, d_nda), 0, "aaud8pl",
+           8 * 4, 0, 0, "aaud8pl",
            NULL, IPL_VM, iopaau_desc_ctor, NULL, NULL);
 
        /* Register us with dmover. */
diff -r 8650c830d4a3 -r 51bcd54a3ed3 sys/arch/arm/xscale/iopaaureg.h
--- a/sys/arch/arm/xscale/iopaaureg.h   Sun Mar 17 06:17:30 2019 +0000
+++ b/sys/arch/arm/xscale/iopaaureg.h   Sun Mar 17 06:36:22 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: iopaaureg.h,v 1.3 2002/08/03 21:58:56 thorpej Exp $    */
+/*     $NetBSD: iopaaureg.h,v 1.4 2019/03/17 06:36:22 maxv Exp $       */
 
 /*
  * Copyright (c) 2002 Wasabi Systems, Inc.
@@ -61,7 +61,7 @@
        uint32_t d_pa;                  /* our physical address */
 
        /* Hardware portion -- must be 32-byte aligned. */
-       uint32_t        d_nda;          /* next descriptor address */
+       uint32_t        d_nda __aligned(32); /* next descriptor address */
        uint32_t        d_sar[4];       /* source address */
        uint32_t        d_dar;          /* destination address */
        uint32_t        d_bc;           /* byte count */
@@ -73,7 +73,7 @@
        uint32_t d_pa;                  /* our physical address */
 
        /* Hardware portion -- must be 32-byte aligned. */
-       uint32_t        d_nda;          /* next descriptor address */
+       uint32_t        d_nda __aligned(32); /* next descriptor address */
        uint32_t        d_sar[4];       /* source address */
        uint32_t        d_dar;          /* destination address */
        uint32_t        d_bc;           /* byte count */
@@ -87,7 +87,7 @@
        uint32_t d_pa;                  /* our physical address */
 
        /* Hardware portion -- must be 32-byte aligned. */
-       uint32_t        d_nda;          /* next descriptor address */
+       uint32_t        d_nda __aligned(32); /* next descriptor address */
        uint32_t        d_sar[4];       /* source address */
        uint32_t        d_dar;          /* destination address */
        uint32_t        d_bc;           /* byte count */
@@ -104,7 +104,7 @@
        uint32_t d_pa;                  /* our physical address */
 
        /* Hardware portion -- must be 32-byte aligned. */
-       uint32_t        d_nda;          /* next descriptor address */
+       uint32_t        d_nda __aligned(32); /* next descriptor address */
        uint32_t        d_sar[4];       /* source address */
        uint32_t        d_dar;          /* destination address */
        uint32_t        d_bc;           /* byte count */