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[src/trunk]: src/sys/arch/mips/mips Typo in comment
details: https://anonhg.NetBSD.org/src/rev/ab2e23237fe7
branches: trunk
changeset: 450407:ab2e23237fe7
user: skrll <skrll%NetBSD.org@localhost>
date: Fri Apr 12 21:12:21 2019 +0000
description:
Typo in comment
diffstat:
sys/arch/mips/mips/spl.S | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diffs (27 lines):
diff -r 09267a663a19 -r ab2e23237fe7 sys/arch/mips/mips/spl.S
--- a/sys/arch/mips/mips/spl.S Fri Apr 12 17:43:25 2019 +0000
+++ b/sys/arch/mips/mips/spl.S Fri Apr 12 21:12:21 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: spl.S,v 1.16 2016/11/18 16:23:40 skrll Exp $ */
+/* $NetBSD: spl.S,v 1.17 2019/04/12 21:12:21 skrll Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include <mips/asm.h>
#include <mips/cpuregs.h>
-RCSID("$NetBSD: spl.S,v 1.16 2016/11/18 16:23:40 skrll Exp $")
+RCSID("$NetBSD: spl.S,v 1.17 2019/04/12 21:12:21 skrll Exp $")
#include "assym.h"
@@ -172,7 +172,7 @@
STATIC_LEAF(_splsw_spl0)
INT_L v1, _C_LABEL(ipl_sr_map) + 4*IPL_NONE
PTR_L a3, L_CPU(MIPS_CURLWP)
- or v1, MIPS_SR_INT_IE # mask sure interrupts are on
+ or v1, MIPS_SR_INT_IE # make sure interrupts are on
xor v1, MIPS_INT_MASK # invert
mfc0 a0, MIPS_COP_0_STATUS
MFC0_HAZARD # load delay
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