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[src/trunk]: src/sys/arch/x86/x86 Rename the PTE bits.
details: https://anonhg.NetBSD.org/src/rev/cfedf5ab52a8
branches: trunk
changeset: 450633:cfedf5ab52a8
user: maxv <maxv%NetBSD.org@localhost>
date: Sun Apr 21 06:37:21 2019 +0000
description:
Rename the PTE bits.
diffstat:
sys/arch/x86/x86/bus_dma.c | 8 ++++----
sys/arch/x86/x86/db_memrw.c | 6 +++---
sys/arch/x86/x86/kgdb_machdep.c | 8 ++++----
sys/arch/x86/x86/svs.c | 14 +++++++-------
sys/arch/x86/x86/x86_tlb.c | 16 ++++++++--------
5 files changed, 26 insertions(+), 26 deletions(-)
diffs (193 lines):
diff -r 71ad985738c5 -r cfedf5ab52a8 sys/arch/x86/x86/bus_dma.c
--- a/sys/arch/x86/x86/bus_dma.c Sun Apr 21 02:40:35 2019 +0000
+++ b/sys/arch/x86/x86/bus_dma.c Sun Apr 21 06:37:21 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.77 2017/07/31 19:29:19 jdolecek Exp $ */
+/* $NetBSD: bus_dma.c,v 1.78 2019/04/21 06:37:21 maxv Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2007 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.77 2017/07/31 19:29:19 jdolecek Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.78 2019/04/21 06:37:21 maxv Exp $");
/*
* The following is included because _bus_dma_uiomove is derived from
@@ -1176,8 +1176,8 @@
for (va = sva; va < eva; va += PAGE_SIZE) {
pte = kvtopte(va);
opte = *pte;
- if ((opte & PG_N) != 0)
- pmap_pte_clearbits(pte, PG_N);
+ if ((opte & PTE_PCD) != 0)
+ pmap_pte_clearbits(pte, PTE_PCD);
}
pmap_remove(pmap_kernel(), (vaddr_t)kva, (vaddr_t)kva + size);
pmap_update(pmap_kernel());
diff -r 71ad985738c5 -r cfedf5ab52a8 sys/arch/x86/x86/db_memrw.c
--- a/sys/arch/x86/x86/db_memrw.c Sun Apr 21 02:40:35 2019 +0000
+++ b/sys/arch/x86/x86/db_memrw.c Sun Apr 21 06:37:21 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_memrw.c,v 1.10 2019/03/09 08:42:26 maxv Exp $ */
+/* $NetBSD: db_memrw.c,v 1.11 2019/04/21 06:37:21 maxv Exp $ */
/*-
* Copyright (c) 1996, 2000 The NetBSD Foundation, Inc.
@@ -53,7 +53,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_memrw.c,v 1.10 2019/03/09 08:42:26 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_memrw.c,v 1.11 2019/04/21 06:37:21 maxv Exp $");
#include <sys/param.h>
#include <sys/proc.h>
@@ -159,7 +159,7 @@
* with this mapping and subtract it from the
* total size.
*/
- if (pte & PG_PS)
+ if (pte & PTE_PS)
limit = NBPD_L2 - (addr & (NBPD_L2 - 1));
else
limit = PAGE_SIZE - (addr & PGOFSET);
diff -r 71ad985738c5 -r cfedf5ab52a8 sys/arch/x86/x86/kgdb_machdep.c
--- a/sys/arch/x86/x86/kgdb_machdep.c Sun Apr 21 02:40:35 2019 +0000
+++ b/sys/arch/x86/x86/kgdb_machdep.c Sun Apr 21 06:37:21 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: kgdb_machdep.c,v 1.4 2019/03/09 08:42:26 maxv Exp $ */
+/* $NetBSD: kgdb_machdep.c,v 1.5 2019/04/21 06:37:21 maxv Exp $ */
/*
* Copyright (c) 1997, 2017 The NetBSD Foundation, Inc.
@@ -56,7 +56,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: kgdb_machdep.c,v 1.4 2019/03/09 08:42:26 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: kgdb_machdep.c,v 1.5 2019/04/21 06:37:21 maxv Exp $");
#include "opt_ddb.h"
@@ -93,8 +93,8 @@
pte = kvtopte(va);
if ((*pte & PTE_P) == 0)
return 0;
- if (*pte & PG_PS)
- va = (va & PG_LGFRAME) + NBPD_L2;
+ if (*pte & PTE_PS)
+ va = (va & PTE_LGFRAME) + NBPD_L2;
else
va += PAGE_SIZE;
} while (va < last_va);
diff -r 71ad985738c5 -r cfedf5ab52a8 sys/arch/x86/x86/svs.c
--- a/sys/arch/x86/x86/svs.c Sun Apr 21 02:40:35 2019 +0000
+++ b/sys/arch/x86/x86/svs.c Sun Apr 21 06:37:21 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: svs.c,v 1.24 2019/03/23 10:02:05 maxv Exp $ */
+/* $NetBSD: svs.c,v 1.25 2019/04/21 06:37:21 maxv Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.24 2019/03/23 10:02:05 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.25 2019/04/21 06:37:21 maxv Exp $");
#include "opt_svs.h"
@@ -259,7 +259,7 @@
dstpde[pidx] = PTE_P | PTE_W | pa;
}
- pa = (paddr_t)(dstpde[pidx] & PG_FRAME);
+ pa = (paddr_t)(dstpde[pidx] & PTE_FRAME);
dstpde = (pd_entry_t *)PMAP_DIRECT_MAP(pa);
}
@@ -287,10 +287,10 @@
if (!pmap_valid_entry(srcpde[idx])) {
panic("%s: L2 page not mapped", __func__);
}
- if (srcpde[idx] & PG_PS) {
- pa = srcpde[idx] & PG_2MFRAME;
+ if (srcpde[idx] & PTE_PS) {
+ pa = srcpde[idx] & PTE_2MFRAME;
pa += (paddr_t)(va % NBPD_L2);
- pde = (srcpde[idx] & ~(PG_G|PG_PS|PG_2MFRAME)) | pa;
+ pde = (srcpde[idx] & ~(PTE_G|PTE_PS|PTE_2MFRAME)) | pa;
if (pmap_valid_entry(dstpde[pidx])) {
panic("%s: L1 page already mapped", __func__);
@@ -310,7 +310,7 @@
if (pmap_valid_entry(dstpde[pidx])) {
panic("%s: L1 page already mapped", __func__);
}
- dstpde[pidx] = srcpde[idx] & ~(PG_G);
+ dstpde[pidx] = srcpde[idx] & ~(PTE_G);
}
static void
diff -r 71ad985738c5 -r cfedf5ab52a8 sys/arch/x86/x86/x86_tlb.c
--- a/sys/arch/x86/x86/x86_tlb.c Sun Apr 21 02:40:35 2019 +0000
+++ b/sys/arch/x86/x86/x86_tlb.c Sun Apr 21 06:37:21 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: x86_tlb.c,v 1.6 2019/02/21 12:17:52 maxv Exp $ */
+/* $NetBSD: x86_tlb.c,v 1.7 2019/04/21 06:37:21 maxv Exp $ */
/*-
* Copyright (c) 2008-2012 The NetBSD Foundation, Inc.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: x86_tlb.c,v 1.6 2019/02/21 12:17:52 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: x86_tlb.c,v 1.7 2019/04/21 06:37:21 maxv Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -199,7 +199,7 @@
/* Find out what we need to invalidate. */
if (tp->tp_count == (uint16_t)-1) {
- if (tp->tp_pte & PG_G) {
+ if (tp->tp_pte & PTE_G) {
/* Invalidating user and kernel TLB entries. */
tlbflushg();
} else {
@@ -224,7 +224,7 @@
int s;
#ifndef XENPV
- KASSERT((pte & PG_G) == 0 || pm == pmap_kernel());
+ KASSERT((pte & PTE_G) == 0 || pm == pmap_kernel());
#endif
if (__predict_false(pm->pm_tlb_flush != NULL)) {
@@ -240,8 +240,8 @@
return;
}
- if ((pte & PG_PS) != 0) {
- va &= PG_LGFRAME;
+ if ((pte & PTE_PS) != 0) {
+ va &= PTE_LGFRAME;
}
/*
@@ -250,8 +250,8 @@
s = splvm();
tp = (pmap_tlb_packet_t *)curcpu()->ci_pmap_data;
- /* Whole address flush will be needed if PG_G is set. */
- CTASSERT(PG_G == (uint16_t)PG_G);
+ /* Whole address flush will be needed if PTE_G is set. */
+ CTASSERT(PTE_G == (uint16_t)PTE_G);
tp->tp_pte |= (uint16_t)pte;
if (tp->tp_count == (uint16_t)-1) {
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