[src/trunk]: src/sys/arch/arm/cortex Fix definition of GICD_IROUTER; the inpu...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/90cf5cf6aca0
branches:  trunk
changeset: 450995:90cf5cf6aca0
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Thu May 02 23:07:40 2019 +0000

description:
Fix definition of GICD_IROUTER; the input to this macro is the INTID,
which can be a value between 32 and 1019.

diffstat:

 sys/arch/arm/cortex/gic_reg.h |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r 02fa42e0c30d -r 90cf5cf6aca0 sys/arch/arm/cortex/gic_reg.h
--- a/sys/arch/arm/cortex/gic_reg.h     Thu May 02 22:52:21 2019 +0000
+++ b/sys/arch/arm/cortex/gic_reg.h     Thu May 02 23:07:40 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: gic_reg.h,v 1.10 2018/11/24 15:40:57 skrll Exp $       */
+/*     $NetBSD: gic_reg.h,v 1.11 2019/05/02 23:07:40 jmcneill Exp $    */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -138,7 +138,7 @@
 #define        GICD_SGIR               0xF00 // Software Generated Interrupt Register
 #define        GICD_CPENDSGIR(n)       (0xF10+4*(n)) // SGI Clear-Pending Registers
 #define        GICD_SPENDSGIR(n)       (0xF20+4*(n)) // SGI Set-Pending Registers
-#define        GICD_IROUTER(n)         (0x6100+8*(n)) // Interrupt Routing Registers
+#define        GICD_IROUTER(n)         (0x6000+8*(n)) // Interrupt Routing Registers
 
 #define        GICD_CTRL_RWP                   __BIT(31)       // GICv3
 #define        GICD_CTRL_E1NWF                 __BIT(7)        // GICv3