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[xsrc/trunk]: xsrc/external/mit/libdrm/dist initial import of libdrm-2.4.99



details:   https://anonhg.NetBSD.org/xsrc/rev/f6f90c8f7a18
branches:  trunk
changeset: 10348:f6f90c8f7a18
user:      mrg <mrg%NetBSD.org@localhost>
date:      Mon Jul 15 05:42:02 2019 +0000

description:
initial import of libdrm-2.4.99

diffstat:

 external/mit/libdrm/dist/amdgpu/amdgpu-symbol-check       |     7 +
 external/mit/libdrm/dist/amdgpu/amdgpu.h                  |   137 +-
 external/mit/libdrm/dist/amdgpu/amdgpu_cs.c               |   141 +-
 external/mit/libdrm/dist/amdgpu/amdgpu_device.c           |    30 +-
 external/mit/libdrm/dist/configure                        |    22 +-
 external/mit/libdrm/dist/configure.ac                     |     4 +-
 external/mit/libdrm/dist/data/amdgpu.ids                  |     5 +
 external/mit/libdrm/dist/etnaviv/etnaviv-symbol-check     |     1 -
 external/mit/libdrm/dist/etnaviv/etnaviv_cmd_stream.c     |     8 +-
 external/mit/libdrm/dist/etnaviv/etnaviv_drmif.h          |     2 -
 external/mit/libdrm/dist/etnaviv/etnaviv_priv.h           |     2 +-
 external/mit/libdrm/dist/exynos/exynos_drm.c              |     2 +-
 external/mit/libdrm/dist/exynos/exynos_drm.h              |     2 +-
 external/mit/libdrm/dist/exynos/exynos_drmif.h            |     2 +-
 external/mit/libdrm/dist/freedreno/freedreno_ringbuffer.h |     3 +-
 external/mit/libdrm/dist/freedreno/msm/msm_ringbuffer.c   |     2 +-
 external/mit/libdrm/dist/include/drm/amdgpu_drm.h         |    61 +-
 external/mit/libdrm/dist/include/drm/drm_fourcc.h         |   138 +-
 external/mit/libdrm/dist/include/drm/drm_mode.h           |    25 +-
 external/mit/libdrm/dist/include/drm/virtgpu_drm.h        |    13 +-
 external/mit/libdrm/dist/include/drm/vmwgfx_drm.h         |     6 +-
 external/mit/libdrm/dist/intel/i915_pciids.h              |    65 +-
 external/mit/libdrm/dist/intel/intel_bufmgr_priv.h        |     2 +-
 external/mit/libdrm/dist/intel/mm.h                       |     2 +-
 external/mit/libdrm/dist/libdrm_macros.h                  |     4 +-
 external/mit/libdrm/dist/libkms/libkms.pc.in              |     2 +-
 external/mit/libdrm/dist/man/drm.xml                      |     4 +-
 external/mit/libdrm/dist/meson.build                      |     4 +-
 external/mit/libdrm/dist/omap/omap_drm.c                  |     2 +-
 external/mit/libdrm/dist/tests/amdgpu/Makefile.am         |     4 +-
 external/mit/libdrm/dist/tests/amdgpu/Makefile.in         |    37 +-
 external/mit/libdrm/dist/tests/amdgpu/amdgpu_test.c       |    40 +-
 external/mit/libdrm/dist/tests/amdgpu/amdgpu_test.h       |    43 +
 external/mit/libdrm/dist/tests/amdgpu/basic_tests.c       |  1232 ++++++++++++-
 external/mit/libdrm/dist/tests/amdgpu/deadlock_tests.c    |   103 +-
 external/mit/libdrm/dist/tests/amdgpu/meson.build         |     2 +-
 external/mit/libdrm/dist/tests/amdgpu/ras_tests.c         |   650 ++++++
 external/mit/libdrm/dist/tests/amdgpu/syncobj_tests.c     |   298 +++
 external/mit/libdrm/dist/tests/amdgpu/vce_tests.c         |     4 +-
 external/mit/libdrm/dist/tests/amdgpu/vcn_tests.c         |    50 +-
 external/mit/libdrm/dist/tests/kms/libkms-test-plane.c    |     4 +-
 external/mit/libdrm/dist/tests/modetest/buffers.c         |    13 +
 external/mit/libdrm/dist/tests/util/format.c              |     7 +
 external/mit/libdrm/dist/tests/util/kms.c                 |     1 +
 external/mit/libdrm/dist/tests/util/pattern.c             |   436 ++++-
 external/mit/libdrm/dist/tests/util/pattern.h             |     7 +
 46 files changed, 3511 insertions(+), 118 deletions(-)

diffs (truncated from 4874 to 300 lines):

diff -r 1f0cfcfaef8b -r f6f90c8f7a18 external/mit/libdrm/dist/amdgpu/amdgpu-symbol-check
--- a/external/mit/libdrm/dist/amdgpu/amdgpu-symbol-check       Mon Jul 15 05:38:37 2019 +0000
+++ b/external/mit/libdrm/dist/amdgpu/amdgpu-symbol-check       Mon Jul 15 05:42:02 2019 +0000
@@ -38,6 +38,7 @@
 amdgpu_cs_ctx_create
 amdgpu_cs_ctx_create2
 amdgpu_cs_ctx_free
+amdgpu_cs_ctx_override_priority
 amdgpu_cs_destroy_semaphore
 amdgpu_cs_destroy_syncobj
 amdgpu_cs_export_syncobj
@@ -51,9 +52,15 @@
 amdgpu_cs_submit_raw
 amdgpu_cs_submit_raw2
 amdgpu_cs_syncobj_export_sync_file
+amdgpu_cs_syncobj_export_sync_file2
 amdgpu_cs_syncobj_import_sync_file
+amdgpu_cs_syncobj_import_sync_file2
+amdgpu_cs_syncobj_query
 amdgpu_cs_syncobj_reset
 amdgpu_cs_syncobj_signal
+amdgpu_cs_syncobj_timeline_signal
+amdgpu_cs_syncobj_timeline_wait
+amdgpu_cs_syncobj_transfer
 amdgpu_cs_syncobj_wait
 amdgpu_cs_wait_fences
 amdgpu_cs_wait_semaphore
diff -r 1f0cfcfaef8b -r f6f90c8f7a18 external/mit/libdrm/dist/amdgpu/amdgpu.h
--- a/external/mit/libdrm/dist/amdgpu/amdgpu.h  Mon Jul 15 05:38:37 2019 +0000
+++ b/external/mit/libdrm/dist/amdgpu/amdgpu.h  Mon Jul 15 05:42:02 2019 +0000
@@ -87,8 +87,8 @@
        /** DMA-buf fd handle */
        amdgpu_bo_handle_type_dma_buf_fd = 2,
 
-       /** KMS handle, but re-importing as a DMABUF handle through
-        *  drmPrimeHandleToFD is forbidden. (Glamor does that)
+       /** Deprecated in favour of and same behaviour as
+        * amdgpu_bo_handle_type_kms, use that instead of this
         */
        amdgpu_bo_handle_type_kms_noimport = 3,
 };
@@ -702,7 +702,7 @@
                                  uint64_t *offset_in_bo);
 
 /**
- * Free previosuly allocated memory
+ * Free previously allocated memory
  *
  * \param   dev               - \c [in] Device handle. See #amdgpu_device_initialize()
  * \param   buf_handle - \c [in]  Buffer handle to free
@@ -732,7 +732,7 @@
 void amdgpu_bo_inc_ref(amdgpu_bo_handle bo);
 
 /**
- * Request CPU access to GPU accessable memory
+ * Request CPU access to GPU accessible memory
  *
  * \param   buf_handle - \c [in] Buffer handle
  * \param   cpu        - \c [out] CPU address to be used for access
@@ -912,6 +912,21 @@
 int amdgpu_cs_ctx_free(amdgpu_context_handle context);
 
 /**
+ * Override the submission priority for the given context using a master fd.
+ *
+ * \param   dev        - \c [in] device handle
+ * \param   context    - \c [in] context handle for context id
+ * \param   master_fd  - \c [in] The master fd to authorize the override.
+ * \param   priority   - \c [in] The priority to assign to the context.
+ *
+ * \return 0 on success or a a negative Posix error code on failure.
+ */
+int amdgpu_cs_ctx_override_priority(amdgpu_device_handle dev,
+                                    amdgpu_context_handle context,
+                                    int master_fd,
+                                    unsigned priority);
+
+/**
  * Query reset state for the specific GPU Context
  *
  * \param   context - \c [in]  GPU Context handle
@@ -1263,7 +1278,7 @@
  * \notes \n
  * It is client responsibility to correctly handle VA assignments and usage.
  * Neither kernel driver nor libdrm_amdpgu are able to prevent and
- * detect wrong va assignemnt.
+ * detect wrong va assignment.
  *
  * It is client responsibility to correctly handle multi-GPU cases and to pass
  * the corresponding arrays of all devices handles where corresponding VA will
@@ -1502,6 +1517,23 @@
                             const uint32_t *syncobjs, uint32_t syncobj_count);
 
 /**
+ * Signal kernel timeline sync objects.
+ *
+ * \param dev           - \c [in] device handle
+ * \param syncobjs      - \c [in] array of sync object handles
+ * \param points       - \c [in] array of timeline points
+ * \param syncobj_count - \c [in] number of handles in syncobjs
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_cs_syncobj_timeline_signal(amdgpu_device_handle dev,
+                                     const uint32_t *syncobjs,
+                                     uint64_t *points,
+                                     uint32_t syncobj_count);
+
+/**
  *  Wait for one or all sync objects to signal.
  *
  * \param   dev            - \c [in] self-explanatory
@@ -1522,6 +1554,45 @@
                           uint32_t *first_signaled);
 
 /**
+ *  Wait for one or all sync objects on their points to signal.
+ *
+ * \param   dev            - \c [in] self-explanatory
+ * \param   handles - \c [in] array of sync object handles
+ * \param   points - \c [in] array of sync points to wait
+ * \param   num_handles - \c [in] self-explanatory
+ * \param   timeout_nsec - \c [in] self-explanatory
+ * \param   flags   - \c [in] a bitmask of DRM_SYNCOBJ_WAIT_FLAGS_*
+ * \param   first_signaled - \c [in] self-explanatory
+ *
+ * \return   0 on success\n
+ *          -ETIME - Timeout
+ *          <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
+                                   uint32_t *handles, uint64_t *points,
+                                   unsigned num_handles,
+                                   int64_t timeout_nsec, unsigned flags,
+                                   uint32_t *first_signaled);
+/**
+ *  Query sync objects payloads.
+ *
+ * \param   dev            - \c [in] self-explanatory
+ * \param   handles - \c [in] array of sync object handles
+ * \param   points - \c [out] array of sync points returned, which presents
+ * syncobj payload.
+ * \param   num_handles - \c [in] self-explanatory
+ *
+ * \return   0 on success\n
+ *          -ETIME - Timeout
+ *          <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
+                           uint32_t *handles, uint64_t *points,
+                           unsigned num_handles);
+
+/**
  *  Export kernel sync object to shareable fd.
  *
  * \param   dev               - \c [in] device handle
@@ -1579,6 +1650,62 @@
 int amdgpu_cs_syncobj_import_sync_file(amdgpu_device_handle dev,
                                       uint32_t syncobj,
                                       int sync_file_fd);
+/**
+ *  Export kernel timeline sync object to a sync_file.
+ *
+ * \param   dev                - \c [in] device handle
+ * \param   syncobj    - \c [in] sync object handle
+ * \param   point      - \c [in] timeline point
+ * \param   flags      - \c [in] flags
+ * \param   sync_file_fd - \c [out] sync_file file descriptor.
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_export_sync_file2(amdgpu_device_handle dev,
+                                       uint32_t syncobj,
+                                       uint64_t point,
+                                       uint32_t flags,
+                                       int *sync_file_fd);
+
+/**
+ *  Import kernel timeline sync object from a sync_file.
+ *
+ * \param   dev                - \c [in] device handle
+ * \param   syncobj    - \c [in] sync object handle
+ * \param   point      - \c [in] timeline point
+ * \param   sync_file_fd - \c [in] sync_file file descriptor.
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_import_sync_file2(amdgpu_device_handle dev,
+                                       uint32_t syncobj,
+                                       uint64_t point,
+                                       int sync_file_fd);
+
+/**
+ *  transfer between syncbojs.
+ *
+ * \param   dev                - \c [in] device handle
+ * \param   dst_handle - \c [in] sync object handle
+ * \param   dst_point  - \c [in] timeline point, 0 presents dst is binary
+ * \param   src_handle - \c [in] sync object handle
+ * \param   src_point  - \c [in] timeline point, 0 presents src is binary
+ * \param   flags      - \c [in] flags
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_transfer(amdgpu_device_handle dev,
+                              uint32_t dst_handle,
+                              uint64_t dst_point,
+                              uint32_t src_handle,
+                              uint64_t src_point,
+                              uint32_t flags);
 
 /**
  * Export an amdgpu fence as a handle (syncobj or fd).
diff -r 1f0cfcfaef8b -r f6f90c8f7a18 external/mit/libdrm/dist/amdgpu/amdgpu_cs.c
--- a/external/mit/libdrm/dist/amdgpu/amdgpu_cs.c       Mon Jul 15 05:38:37 2019 +0000
+++ b/external/mit/libdrm/dist/amdgpu/amdgpu_cs.c       Mon Jul 15 05:42:02 2019 +0000
@@ -142,6 +142,31 @@
        return r;
 }
 
+drm_public int amdgpu_cs_ctx_override_priority(amdgpu_device_handle dev,
+                                               amdgpu_context_handle context,
+                                               int master_fd,
+                                               unsigned priority)
+{
+       union drm_amdgpu_sched args;
+       int r;
+
+       if (!dev || !context || master_fd < 0)
+               return -EINVAL;
+
+       memset(&args, 0, sizeof(args));
+
+       args.in.op = AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE;
+       args.in.fd = dev->fd;
+       args.in.priority = priority;
+       args.in.ctx_id = context->id;
+
+       r = drmCommandWrite(master_fd, DRM_AMDGPU_SCHED, &args, sizeof(args));
+       if (r)
+               return r;
+
+       return 0;
+}
+
 drm_public int amdgpu_cs_query_reset_state(amdgpu_context_handle context,
                                           uint32_t *state, uint32_t *hangs)
 {
@@ -649,6 +674,18 @@
        return drmSyncobjSignal(dev->fd, syncobjs, syncobj_count);
 }
 
+drm_public int amdgpu_cs_syncobj_timeline_signal(amdgpu_device_handle dev,
+                                                const uint32_t *syncobjs,
+                                                uint64_t *points,
+                                                uint32_t syncobj_count)
+{
+       if (NULL == dev)
+               return -EINVAL;
+
+       return drmSyncobjTimelineSignal(dev->fd, syncobjs,
+                                       points, syncobj_count);
+}
+
 drm_public int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,
                                      uint32_t *handles, unsigned num_handles,
                                      int64_t timeout_nsec, unsigned flags,
@@ -661,6 +698,29 @@
                              flags, first_signaled);
 }
 
+drm_public int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
+                                              uint32_t *handles, uint64_t *points,
+                                              unsigned num_handles,
+                                              int64_t timeout_nsec, unsigned flags,
+                                              uint32_t *first_signaled)
+{
+       if (NULL == dev)
+               return -EINVAL;
+
+       return drmSyncobjTimelineWait(dev->fd, handles, points, num_handles,
+                                     timeout_nsec, flags, first_signaled);
+}
+
+drm_public int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
+                                      uint32_t *handles, uint64_t *points,
+                                      unsigned num_handles)
+{
+       if (NULL == dev)
+               return -EINVAL;



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