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[src/netbsd-8]: src/sys/dev/pci Pull up following revision(s) (requested by m...
details: https://anonhg.NetBSD.org/src/rev/b5d28b6739f7
branches: netbsd-8
changeset: 453759:b5d28b6739f7
user: martin <martin%NetBSD.org@localhost>
date: Tue Aug 06 16:02:54 2019 +0000
description:
Pull up following revision(s) (requested by msaitoh in ticket #1327):
sys/dev/pci/piixpmreg.h: revision 1.8
sys/dev/pci/piixpm.c: revision 1.53
sys/dev/pci/piixpm.c: revision 1.54
Sync with OpenBSD's piixpm.c up to rev. 1.35:
- Print "polling" correctly when in the attach function. Same as OpenBSD
rev. 1.22-23.
- Improve debug printf()'s. Part of OpenBSD 1.24.
- Do not bus_space_map devices which are at address 0 (it's uninitialized).
Same as OpenBSD rev. 1.25.
- Add ServerWorks HT1100 device from OpenBSD. Same as OpenBSD rev. 1.32
- Use unique wait channel. From OpenBSD rev. 1.35
Improve SB800 and newer chipsets support:
- Add newer chipset (e.g. X370/X399 and newer) support that the PCI device id
is 0x790b. The register definitions are mainly taken from FreeBSD.
- Rename PIIXPM_INDIRECTIO_* to SB800_INDIRECTIO_* because those are only
for SB800 and newer chipsets.
- SB800 also support 4 ports.
- SB800's interrupt configuration bit is different from others.
Use SB800_SMB_HOSTC's bit 0.
- Do not bus_space_map devices which are at address 0 (it's uninitialized)
in piixpm_attach().
- Add the port number to the dmesg output.
- Avoid uninitiliazed use of ctl and corresponding warnings. From OpenBSD rev.
1.38
diffstat:
sys/dev/pci/piixpm.c | 220 ++++++++++++++++++++++++++++++-----------------
sys/dev/pci/piixpmreg.h | 68 +++++++++++++-
2 files changed, 204 insertions(+), 84 deletions(-)
diffs (truncated from 521 to 300 lines):
diff -r 12d5107b7b0a -r b5d28b6739f7 sys/dev/pci/piixpm.c
--- a/sys/dev/pci/piixpm.c Tue Aug 06 15:52:23 2019 +0000
+++ b/sys/dev/pci/piixpm.c Tue Aug 06 16:02:54 2019 +0000
@@ -1,5 +1,5 @@
-/* $NetBSD: piixpm.c,v 1.52 2017/03/29 09:04:36 msaitoh Exp $ */
-/* $OpenBSD: piixpm.c,v 1.20 2006/02/27 08:25:02 grange Exp $ */
+/* $NetBSD: piixpm.c,v 1.52.6.1 2019/08/06 16:02:54 martin Exp $ */
+/* $OpenBSD: piixpm.c,v 1.39 2013/10/01 20:06:02 sf Exp $ */
/*
* Copyright (c) 2005, 2006 Alexander Yurchenko <grange%openbsd.org@localhost>
@@ -22,7 +22,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: piixpm.c,v 1.52 2017/03/29 09:04:36 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: piixpm.c,v 1.52.6.1 2019/08/06 16:02:54 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -49,12 +49,27 @@
#define DPRINTF(x)
#endif
-#define PIIXPM_IS_CSB5(id) \
- (PCI_VENDOR((id)) == PCI_VENDOR_SERVERWORKS && \
- PCI_PRODUCT((id)) == PCI_PRODUCT_SERVERWORKS_CSB5)
+#define PIIXPM_IS_CSB5(sc) \
+ (PCI_VENDOR((sc)->sc_id) == PCI_VENDOR_SERVERWORKS && \
+ PCI_PRODUCT((sc)->sc_id) == PCI_PRODUCT_SERVERWORKS_CSB5)
#define PIIXPM_DELAY 200
#define PIIXPM_TIMEOUT 1
+#define PIIXPM_IS_SB800GRP(sc) \
+ ((PCI_VENDOR((sc)->sc_id) == PCI_VENDOR_ATI) && \
+ ((PCI_PRODUCT((sc)->sc_id) == PCI_PRODUCT_ATI_SB600_SMB) && \
+ ((sc)->sc_rev >= 0x40)))
+
+#define PIIXPM_IS_HUDSON(sc) \
+ ((PCI_VENDOR((sc)->sc_id) == PCI_VENDOR_AMD) && \
+ (PCI_PRODUCT((sc)->sc_id) == PCI_PRODUCT_AMD_HUDSON_SMB))
+
+#define PIIXPM_IS_KERNCZ(sc) \
+ ((PCI_VENDOR((sc)->sc_id) == PCI_VENDOR_AMD) && \
+ (PCI_PRODUCT((sc)->sc_id) == PCI_PRODUCT_AMD_KERNCZ_SMB))
+
+#define PIIXPM_IS_FCHGRP(sc) (PIIXPM_IS_HUDSON(sc) || PIIXPM_IS_KERNCZ(sc))
+
struct piixpm_smbus {
int sda;
struct piixpm_softc *softc;
@@ -75,6 +90,7 @@
pci_chipset_tag_t sc_pc;
pcitag_t sc_pcitag;
pcireg_t sc_id;
+ pcireg_t sc_rev;
int sc_numbusses;
device_t sc_i2c_device[4];
@@ -142,12 +158,14 @@
case PCI_PRODUCT_SERVERWORKS_CSB5:
case PCI_PRODUCT_SERVERWORKS_CSB6:
case PCI_PRODUCT_SERVERWORKS_HT1000SB:
+ case PCI_PRODUCT_SERVERWORKS_HT1100SB:
return 1;
}
break;
case PCI_VENDOR_AMD:
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_AMD_HUDSON_SMB:
+ case PCI_PRODUCT_AMD_KERNCZ_SMB:
return 1;
}
break;
@@ -164,6 +182,7 @@
pcireg_t base, conf;
pcireg_t pmmisc;
pci_intr_handle_t ih;
+ bool usesmi = false;
const char *intrstr = NULL;
int i, flags;
char intrbuf[PCI_INTRSTR_LEN];
@@ -171,6 +190,7 @@
sc->sc_dev = self;
sc->sc_iot = pa->pa_iot;
sc->sc_id = pa->pa_id;
+ sc->sc_rev = PCI_REVISION(pa->pa_class);
sc->sc_pc = pa->pa_pc;
sc->sc_pcitag = pa->pa_tag;
sc->sc_numbusses = 1;
@@ -180,10 +200,6 @@
if (!pmf_device_register(self, piixpm_suspend, piixpm_resume))
aprint_error_dev(self, "couldn't establish power handler\n");
- /* Read configuration */
- conf = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_HOSTC);
- DPRINTF(("%s: conf 0x%x\n", device_xname(self), conf));
-
if ((PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) ||
(PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_INTEL_82371AB_PMC))
goto nopowermanagement;
@@ -195,7 +211,7 @@
/* Map I/O space */
base = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_PM_BASE);
- if (bus_space_map(sc->sc_pm_iot, PCI_MAPREG_IO_ADDR(base),
+ if (base == 0 || bus_space_map(sc->sc_pm_iot, PCI_MAPREG_IO_ADDR(base),
PIIX_PM_SIZE, 0, &sc->sc_pm_ioh)) {
aprint_error_dev(self,
"can't map power management I/O space\n");
@@ -207,69 +223,76 @@
* PIIX4 and PIIX4E have a bug in the timer latch, see Errata #20
* in the "Specification update" (document #297738).
*/
- acpipmtimer_attach(self, sc->sc_pm_iot, sc->sc_pm_ioh,
- PIIX_PM_PMTMR,
- (PCI_REVISION(pa->pa_class) < 3) ? ACPIPMT_BADLATCH : 0 );
+ acpipmtimer_attach(self, sc->sc_pm_iot, sc->sc_pm_ioh, PIIX_PM_PMTMR,
+ (PCI_REVISION(pa->pa_class) < 3) ? ACPIPMT_BADLATCH : 0);
nopowermanagement:
- /* SB800 rev 0x40+ and AMD HUDSON need special initialization */
- if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD &&
- PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_HUDSON_SMB) {
+ /* SB800 rev 0x40+, AMD HUDSON and newer need special initialization */
+ if (PIIXPM_IS_FCHGRP(sc) || PIIXPM_IS_SB800GRP(sc)) {
if (piixpm_sb800_init(sc) == 0) {
- goto attach_i2c;
+ sc->sc_numbusses = 4;
+
+ /* Read configuration */
+ conf = pci_conf_read(pa->pa_pc, pa->pa_tag,
+ SB800_SMB_HOSTC);
+ DPRINTF(("%s: conf 0x%08x\n", device_xname(self),
+ conf));
+
+ usesmi = conf & SB800_SMB_HOSTC_SMI;
+ goto setintr;
}
aprint_normal_dev(self, "SMBus initialization failed\n");
return;
}
- if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI &&
- PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATI_SB600_SMB &&
- PCI_REVISION(pa->pa_class) >= 0x40) {
- if (piixpm_sb800_init(sc) == 0) {
- sc->sc_numbusses = 4;
- goto attach_i2c;
- }
- aprint_normal_dev(self, "SMBus initialization failed\n");
- return;
- }
+
+ /* Read configuration */
+ conf = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_HOSTC);
+ DPRINTF(("%s: conf 0x%08x\n", device_xname(self), conf));
if ((conf & PIIX_SMB_HOSTC_HSTEN) == 0) {
aprint_normal_dev(self, "SMBus disabled\n");
return;
}
+ usesmi = (conf & PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_SMI;
/* Map I/O space */
base = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_BASE) & 0xffff;
- if (bus_space_map(sc->sc_smb_iot, PCI_MAPREG_IO_ADDR(base),
+ if (base == 0 ||
+ bus_space_map(sc->sc_smb_iot, PCI_MAPREG_IO_ADDR(base),
PIIX_SMB_SIZE, 0, &sc->sc_smb_ioh)) {
aprint_error_dev(self, "can't map smbus I/O space\n");
return;
}
+setintr:
sc->sc_poll = 1;
aprint_normal_dev(self, "");
- if ((conf & PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_SMI) {
+ if (usesmi) {
/* No PCI IRQ */
aprint_normal("interrupting at SMI, ");
- } else if ((conf & PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_IRQ) {
- /* Install interrupt handler */
- if (pci_intr_map(pa, &ih) == 0) {
- intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf,
- sizeof(intrbuf));
- sc->sc_smb_ih = pci_intr_establish_xname(pa->pa_pc, ih,
- IPL_BIO, piixpm_intr, sc, device_xname(sc->sc_dev));
- if (sc->sc_smb_ih != NULL) {
- aprint_normal("interrupting at %s", intrstr);
- sc->sc_poll = 0;
+ } else {
+ if ((conf & PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_IRQ) {
+ /* Install interrupt handler */
+ if (pci_intr_map(pa, &ih) == 0) {
+ intrstr = pci_intr_string(pa->pa_pc, ih,
+ intrbuf, sizeof(intrbuf));
+ sc->sc_smb_ih = pci_intr_establish_xname(
+ pa->pa_pc, ih, IPL_BIO, piixpm_intr,
+ sc, device_xname(sc->sc_dev));
+ if (sc->sc_smb_ih != NULL) {
+ aprint_normal("interrupting at %s",
+ intrstr);
+ sc->sc_poll = 0;
+ }
}
}
+ if (sc->sc_poll)
+ aprint_normal("polling");
}
- if (sc->sc_poll)
- aprint_normal("polling");
aprint_normal("\n");
-attach_i2c:
for (i = 0; i < sc->sc_numbusses; i++)
sc->sc_i2c_device[i] = NULL;
@@ -279,6 +302,20 @@
}
static int
+piixpm_iicbus_print(void *aux, const char *pnp)
+{
+ struct i2cbus_attach_args *iba = aux;
+ struct i2c_controller *tag = iba->iba_tag;
+ struct piixpm_smbus *bus = tag->ic_cookie;
+ struct piixpm_softc *sc = bus->softc;
+
+ iicbus_print(aux, pnp);
+ if (sc->sc_numbusses != 0)
+ aprint_normal(" port %d", bus->sda);
+
+ return UNCONF;
+}
+static int
piixpm_rescan(device_t self, const char *ifattr, const int *flags)
{
struct piixpm_softc *sc = device_private(self);
@@ -303,7 +340,7 @@
iba.iba_type = I2C_TYPE_SMBUS;
iba.iba_tag = &sc->sc_i2c_tags[i];
sc->sc_i2c_device[i] = config_found_ia(self, ifattr, &iba,
- iicbus_print);
+ piixpm_iicbus_print);
}
return 0;
@@ -362,39 +399,53 @@
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh; /* indirect I/O handle */
uint16_t val, base_addr;
+ bool enabled;
/* Fetch SMB base address */
if (bus_space_map(iot,
- PIIXPM_INDIRECTIO_BASE, PIIXPM_INDIRECTIO_SIZE, 0, &ioh)) {
+ SB800_INDIRECTIO_BASE, SB800_INDIRECTIO_SIZE, 0, &ioh)) {
device_printf(sc->sc_dev, "couldn't map indirect I/O space\n");
return EBUSY;
}
- bus_space_write_1(iot, ioh, PIIXPM_INDIRECTIO_INDEX,
- SB800_PM_SMBUS0EN_LO);
- val = bus_space_read_1(iot, ioh, PIIXPM_INDIRECTIO_DATA);
- bus_space_write_1(iot, ioh, PIIXPM_INDIRECTIO_INDEX,
- SB800_PM_SMBUS0EN_HI);
- val |= bus_space_read_1(iot, ioh, PIIXPM_INDIRECTIO_DATA) << 8;
- sc->sc_sb800_ioh = ioh;
+ if (PIIXPM_IS_FCHGRP(sc)) {
+ bus_space_write_1(iot, ioh, SB800_INDIRECTIO_INDEX,
+ AMDFCH41_PM_DECODE_EN0);
+ val = bus_space_read_1(iot, ioh, SB800_INDIRECTIO_DATA);
+ enabled = val & AMDFCH41_SMBUS_EN;
+ if (!enabled)
+ return ENOENT;
- if ((val & SB800_PM_SMBUS0EN_ENABLE) == 0)
- return ENOENT;
-
- base_addr = val & SB800_PM_SMBUS0EN_BADDR;
+ bus_space_write_1(iot, ioh, SB800_INDIRECTIO_INDEX,
+ AMDFCH41_PM_DECODE_EN1);
+ val = bus_space_read_1(iot, ioh, SB800_INDIRECTIO_DATA) << 8;
+ base_addr = val;
+ } else {
+ bus_space_write_1(iot, ioh, SB800_INDIRECTIO_INDEX,
+ SB800_PM_SMBUS0EN_LO);
+ val = bus_space_read_1(iot, ioh, SB800_INDIRECTIO_DATA);
+ enabled = val & SB800_PM_SMBUS0EN_ENABLE;
+ if (!enabled)
+ return ENOENT;
- aprint_debug_dev(sc->sc_dev, "SMBus @ 0x%04x\n", base_addr);
+ bus_space_write_1(iot, ioh, SB800_INDIRECTIO_INDEX,
+ SB800_PM_SMBUS0EN_HI);
+ val |= bus_space_read_1(iot, ioh, SB800_INDIRECTIO_DATA) << 8;
+ base_addr = val & SB800_PM_SMBUS0EN_BADDR;
- bus_space_write_1(iot, ioh, PIIXPM_INDIRECTIO_INDEX,
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