[src/trunk]: src/sys/arch Convert rdmsr_locked and wrmsr_locked to inlines.

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/b836be49023a
branches:  trunk
changeset: 454171:b836be49023a
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sat Sep 07 18:33:16 2019 +0000

description:
Convert rdmsr_locked and wrmsr_locked to inlines.

diffstat:

 sys/arch/amd64/amd64/cpufunc.S |  22 +---------------------
 sys/arch/i386/i386/cpufunc.S   |  24 ++----------------------
 sys/arch/x86/include/cpufunc.h |  34 ++++++++++++++++++++++++++++++----
 3 files changed, 33 insertions(+), 47 deletions(-)

diffs (136 lines):

diff -r 499a2db36bda -r b836be49023a sys/arch/amd64/amd64/cpufunc.S
--- a/sys/arch/amd64/amd64/cpufunc.S    Sat Sep 07 16:37:20 2019 +0000
+++ b/sys/arch/amd64/amd64/cpufunc.S    Sat Sep 07 18:33:16 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.S,v 1.43 2019/07/05 17:08:55 maxv Exp $        */
+/*     $NetBSD: cpufunc.S,v 1.44 2019/09/07 18:33:16 maxv Exp $        */
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -167,26 +167,6 @@
 STRONG_ALIAS(x86_write_psl,x86_write_flags)
 #endif /* XENPV */
 
-ENTRY(rdmsr_locked)
-       movq    %rdi, %rcx
-       xorq    %rax, %rax
-       movl    $OPTERON_MSR_PASSCODE, %edi
-       rdmsr
-       shlq    $32, %rdx
-       orq     %rdx, %rax
-       ret
-END(rdmsr_locked)
-
-ENTRY(wrmsr_locked)
-       movq    %rdi, %rcx
-       movq    %rsi, %rax
-       movq    %rsi, %rdx
-       shrq    $32, %rdx
-       movl    $OPTERON_MSR_PASSCODE, %edi
-       wrmsr
-       ret
-END(wrmsr_locked)
-
 /*
  * Support for reading MSRs in the safe manner (returns EFAULT on fault)
  */
diff -r 499a2db36bda -r b836be49023a sys/arch/i386/i386/cpufunc.S
--- a/sys/arch/i386/i386/cpufunc.S      Sat Sep 07 16:37:20 2019 +0000
+++ b/sys/arch/i386/i386/cpufunc.S      Sat Sep 07 18:33:16 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.S,v 1.34 2019/07/05 17:08:55 maxv Exp $        */
+/*     $NetBSD: cpufunc.S,v 1.35 2019/09/07 18:33:16 maxv Exp $        */
 
 /*-
  * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
 #include <sys/errno.h>
 
 #include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.S,v 1.34 2019/07/05 17:08:55 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.S,v 1.35 2019/09/07 18:33:16 maxv Exp $");
 
 #include "opt_xen.h"
 
@@ -91,26 +91,6 @@
 STRONG_ALIAS(x86_read_psl,x86_read_flags)
 #endif /* XENPV */
 
-ENTRY(rdmsr_locked)
-       movl    4(%esp), %ecx
-       pushl   %edi
-       movl    $OPTERON_MSR_PASSCODE, %edi
-       rdmsr
-       popl    %edi
-       ret
-END(rdmsr_locked)
-
-ENTRY(wrmsr_locked)
-       movl    4(%esp), %ecx
-       movl    8(%esp), %eax
-       movl    12(%esp), %edx
-       pushl   %edi
-       movl    $OPTERON_MSR_PASSCODE, %edi
-       wrmsr
-       popl    %edi
-       ret
-END(wrmsr_locked)
-
 /*
  * Support for reading MSRs in the safe manner (returns EFAULT on fault)
  */
diff -r 499a2db36bda -r b836be49023a sys/arch/x86/include/cpufunc.h
--- a/sys/arch/x86/include/cpufunc.h    Sat Sep 07 16:37:20 2019 +0000
+++ b/sys/arch/x86/include/cpufunc.h    Sat Sep 07 18:33:16 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.h,v 1.35 2019/09/07 11:09:03 maxv Exp $        */
+/*     $NetBSD: cpufunc.h,v 1.36 2019/09/07 18:33:16 maxv Exp $        */
 
 /*
  * Copyright (c) 1998, 2007, 2019 The NetBSD Foundation, Inc.
@@ -419,8 +419,21 @@
        return (low | ((uint64_t)high << 32));
 }
 
-uint64_t       rdmsr_locked(u_int);
-int            rdmsr_safe(u_int, uint64_t *);
+static inline uint64_t
+rdmsr_locked(u_int msr)
+{
+       uint32_t low, high, pass = OPTERON_MSR_PASSCODE;
+
+       __asm volatile (
+               "rdmsr"
+               : "=a" (low), "=d" (high)
+               : "c" (msr), "D" (pass)
+       );
+
+       return (low | ((uint64_t)high << 32));
+}
+
+int    rdmsr_safe(u_int, uint64_t *);
 
 static inline void
 wrmsr(u_int msr, uint64_t val)
@@ -437,7 +450,20 @@
        );
 }
 
-void           wrmsr_locked(u_int, uint64_t);
+static inline void
+wrmsr_locked(u_int msr, uint64_t val)
+{
+       uint32_t low, high, pass = OPTERON_MSR_PASSCODE;
+
+       low = val;
+       high = val >> 32;
+       __asm volatile (
+               "wrmsr"
+               :
+               : "a" (low), "d" (high), "c" (msr), "D" (pass)
+               : "memory"
+       );
+}
 
 #endif /* _KERNEL */